[hpsdr] bypass caps

[Steven Bible]

Thanks a million for the links to the papers Ray, they have been very informative.

One thing that I haven't come across is the size of the via (drill size).  I would think for the lowest impedance, you would want as large a drill size you can have for the layout.  The same could be said for inductance, the larger the drill, the lower the inductance.  Any thoughts on via sizes?

In the Xilinx app note, how did they calculate the percentages in Table 6?  


- Steve N7HPR



-----Original Message-----
>From: Ray Anderson <ray.anderson at xilinx.com>
>Sent: Jul 6, 2006 1:58 PM
>To: hpsdr at hpsdr.org
>Cc: Lyle Johnson <kk7p at wavecable.com>, Steven Bible <n7hpr at tapr.org>, Ray Anderson <ray.anderson at xilinx.com>
>Subject: RE: [hpsdr] bypass caps
>
>
>
>>> For really low mounting inductance you can go to a via-in-pad
>design...
>
>>This makes machine assembly tricky.  Many assembly houses won't deal 
>>with this approach, or charge extra.  I found out the hard way...
>
>>For hand assembly, it works great.
>
>>73,
>
>>Lyle KK7P
>
>
>Lyle-
>
>Yep, you are correct. The run of the mill assembly houses will have
>issues with via-in-pad designs (the solder getting sucked down the via
>hole is the main issue). The high-techy shops that assemble workstations
>and server PCB's finally figured out how to do it consistently, but
>needed to go through $ome $pecial $teps and proce$$e$ to be $uccessful.
>(like plugging vias, using extra small via drills, etc....)
>
>73,
>
>-Ray	WB6TPU
>


\r\n- Steve\r\n  (n7hpr at tapr.org)\r\n

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