[hpsdr] Casmir System Requirements

[Christopher T. Day]

Just as a reminder, the RefLock II should be thought of as a _platform_
for making PLLs, GPS disciplined loops, etc. As actual hardware, its
functionality is undefined and depends completely on the configuration
loaded into the CPLD. There are some pre-compiled configurations
available from Luis, but he is contractually forbidden from releasing
the source since he did it for another paying customer. Anybody is free
to develop their own VHDL/Verilog source for RefLock II through the free
Quartus II Altera development environment that has been used for Xylo,
Janus, Ozy, etc. Making a fractional N machine is "only a matter of
software". Remember, even our hardware is really software on these
projects.

 

I would suggest that the RefLock II could be used as a Gibraltar
prototyping system similar to the way PhilH and Bill have been using the
Xylo board for prototyping Janus.

 

 

            Chris - AE6VK

 

 

  _____  

From: FRANCIS CARCIA [mailto:carcia at sbcglobal.net] 
Sent: Thursday, June 08, 2006 8:41 AM
To: hpsdr at hpsdr.org
Subject: [hpsdr] Casmir System Requirements

 

3.4 Spurs??

 

I was looking at TAPR Reflock 2 thinking it could be modified to a low
frequency source. It looks like the resolution can be set to 100 KHz at
the phase detector.

A divide by 8 would give 12.5 KHz resolution and make I/Q LO. 

Maybe some smart guy could modify it to a fractional n machine. 

These guys look like they could contribute to the source effort.  frank
WA1GFZ 

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