[hpsdr] FPGA Design Flow?

[Bill Tracey]

Phil -- sounds good.

The latest and greatest is not in SVN at the moment  - I need to work on VK 
Phil on working out of SVN on the FPGA code.

I've dumped a .qar of the latest I have 
at:  http://www.tracey.org/wjt/temp/Duplex-v43-26May-wjt.qar

For those reading the Verilog - this one is not setup for the AK part, it's 
setup for the Wolfson and that's the configuration Phil and I both have at 
the moment.

Regards,

Bill (kd5tfd)

At 09:03 PM 6/8/2006, Philip Covington wrote:
<....>
>Hi Bill,
>
>We are using 6.0 at work since previous versions do not support the
>new Stratus II GX part.  I assume the latest is in SVN.  I will try to
>build it tomorrow and send the rbf to you.  So far, we have not had
>any issues upgrading.
>
>73 de Phil N8VB



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