[hpsdr] Mercury Design assistance required

Eric Blossom eb at comsec.com
Thu Jun 22 18:36:48 PDT 2006


On Fri, Jun 23, 2006 at 09:03:56AM +0800, pvharman at arach.net.au wrote:
> Hi Eric,
> 
> Thanks for the suggestions, much appreciated.  The blocks you suggest are very 
> close to what I am using already. The issue that I don't understand is that 
> the AD6620  design notes say that to get 100db of aliasing rejection at 
> 100MHz/100kHz then the maximum decimation you should use in the CIC is 2. AD 
> say that if you increase the decimation level of the CIC then you can't meet 
> the 100dB aliasing requirement. 

OK.  Not sure why that would be.  Maybe they're not carrying enough
internal precision for the additional decimation.  If you find out why,
please let me know.

> I have a design working using a CIC with divide by 512 followed by the half 
> band with your values and decimate by 2. It looks quite good but still needs 
> to compensate for the sinx/x roll off of the CIC and also sharpen up the half 
> band roll off - I guess that this can always be done in the PC.

If you stack two halfbands, you'll sharpen the roll off and increase
the alias rejection.

> There is still some aliasing responses that are < 100dB down so not quite 
> there yet. 
> 
> Getting close, randomizing the output data to prevent it being picked up buy 
> the LT2208 input has made a huge improvement to the number of spurs. Not a 
> problem with the chip, just my breadboard lash up.

Keep me posted!

Eric

 1151026608.0


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