[hpsdr] High Accuracy Timing for HPSDR

Wed May 10 21:49:42 PDT 2006

I gather that Steve has already collaborated with Luis on the RefLock II
board. The physical circuitry of the board is hardly anything beyond
common practice to my eyes [but lawyers have strange eyes]. My
conclusionis from the note Luis posted to the tapr time and frequency
list (I think that's where it was), the original VHDL was written under
contract to a third party who retains the rights to that code. He is
allowed to provide compiled configuration files to amateur radio folks.
It doesn't sound as though the hardware is covered at all. So, we should
go with our own VHDL/Verilog.

Disclaimer: I am not a lawyer and I do not play one on TV. I have no
idea of the legal standing of my statements, if any. No one should base
any decisions on them.

On that happy note -

	Chris - AE6VK

-----Original Message-----
From: Robert McGwier [mailto:rwmcgwier at comcast.net] 
Sent: Wednesday, May 10, 2006 8:34 PM
To: Steven Bible
Cc: hpsdr at hpsdr.org
Subject: Re: [hpsdr] High Accuracy Timing for HPSDR

***** High Performance Software Defined Radio Discussion List *****

It sounds ALMOST like Gibraltar is designed with one potentially fatal 
flaw so let me open the can of worms here and put it openly on the
table.

http://hpsdr.org/

On this page,  there is a clear cut statement about Open Source Design.

Without open CPLD source,  it violates that principle.  I would not 
compromise this if I could.  We should take the hardware design you 
offer, but roll our own verilog and we certainly have more than one 
person capable of doing so.   If you believe no one will get lynched 
over doing this with what was clearly Luis original design modified for 
this project's purposes, then we ought to do this.

Bob
N4HY

Steven Bible wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Alex,
>
> I'd be willing to help with this board since I was the one that laid
out the
> Reflock II PCB.
>
> As to a GPS engine, we need to look for a timing GPS.  A timing GPS
can
> perform a self survey and then lock its position for a more accurate
1PPS
> signal.  The older 8-channel Oncode UT, UT+, and VP, or the newer
12-channel
> M12, M12+, and M12+ Timing have been timing GPS of choice for hams
since we
> could buy them and using W2GPS's TAC32 program to operate them.  Since
> Motorola sold off its Oncore line to SiRF, and the dust is about to
settle,
> the M12 line will come out later this year as the M12M.
>
> I have already started on a PCB that integrates the GPS, Reflock II,
and 10
> MHz OCXO (I am looking at the Crystek CO27VH15DE-12-10.000 available
from
> Mouser).  The goal I have is to design the board such that all the
parts can
> be readily purchased.  I really don't want to rely on surplus GPSs and
> OCXOs.  This entire lash up will be tested in N8UR's timing lab.  The
GPS
> footprint would accomidate the Oncore UT/VP and M12 GPSs.  So if you
can
> populate which ever one you have on hand, or can purchase surplus or a
new
> M121M.
>
> 73,
>
> - Steve, N7HPR
>  (n7hpr at tapr.org)
>
>
>
>   
>> -----Original Message-----
>> From: Alex [mailto:harvilchuck at yahoo.com]
>> Sent: Wednesday, May 10, 2006 2:44 PM
>> To: hpsdr at hpsdr.org
>> Cc: Steven Bible
>> Subject: High Accuracy Timing for HPSDR
>>
>>
>> Would it make sense to have a frequency reference board for the
HPSDR?
>>
>> How about an ATLAS version of the Reflock II board with an integrated
GPS?
>> Say the Sony CXD2956AGL-1 baseband processor and the Sony
>> CXA3355TQ downconverter - basically the guts from an OnStar (tm)
>> GPS receiver...
>>
>> CXD2956AGL-1 -
>> http://www.sony.co.jp/~semicon/english/img/sony01/a6808473.pdf
>> CXA355TQ -
http://www.sony.co.jp/~semicon/english/img/sony01/a6807578.pdf
>>
>> add an appropriate VCXO, put some SMA connectors across the top
>> of the card (modifying the TAPR TADD-1 design) to distribute the
>> reference signal and  then you've got a necessary building block
>> for use by transmitter and receiver board designs ...
>>
>> Just a bit of circut design to add the new parts, the Altera MAX
>> II coding is done for the Reflock II. Will need to add a bit of
>> code for the GPS baseband processor control, it looks like there
>> are enough I/O lines available on the MAX II (based on the docs
>> on CT1DMK's website) unless you let OZY control it. Plus
>> interface the MAX II to the OZY.
>>
>> I could even be persuaded to pony the money up for a couple alpha
boards.
>>
>> Alex, N3NP
>>
>>
>>
>>
>>
>>
>>
>>     
>
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>
>   

-- 
AMSAT VP Engineering. Member: ARRL, AMSAT-DL, TAPR, Packrats,
NJQRP/AMQRP, QRP ARCI, QCWA, FRC. ARRL SDR Wrk Grp Chairman
Laziness is the number one inspiration for ingenuity.  Guilty as
charged!

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