[hpsdr] Operating Configurations

Christopher T. Day CTDay at lbl.gov
Fri May 12 10:31:09 PDT 2006


Phil,

The MAX II probably has the room, but how is OZY supposed to know how to
fetch the information? Hhow is Ozy supposed to know how to get the
information from the card before knowing what the card is? And what
about cards that don't have MAX II's on them?

What I'm looking for is at least part of Alex's standard interface, but
I'd like that to be as small as possible. [It would be nice if the
interface didn't _require_ a particular, or any, CPLD/FPGA. => Some
Atlas bus wires should have defined functions, I think, but as few as we
can manage.] That's why I argued for I2C since it's already there on Ozy
and Atlas, and is a small footprint on any other board (barring problems
with memory space division). 1-Wire sounds even better in principle; I
just can't make the available parts I know about - and I know very
little about them - fit the problem. For instance, my brief scan of the
EEPROM data sheet indicated that the "Erasable" part of that is very
weak; essentially these are Once Programmable devices. For developer's,
turning the typical cycle into Code, Compile, Load, Debug, Heat Up
Soldering Iron, Replace Part and Repeat, doesn't sound very appealing.
Nevermind expensive.


	Chris - AE6VK


-----Original Message-----
From: Alex [mailto:harvilchuck at yahoo.com] 
Sent: Friday, May 12, 2006 8:59 AM
To: Lyle Johnson
Cc: Philip Covington; Christopher T. Day; hpsdr at hpsdr.org
Subject: Re: [hpsdr] Operating Configurations

Which says we REALLY need a standard interface module (comprised of a
MAX II and whatever other I2C, 1-Wire, SPI or other fiddly-bits that are
required) so that us folks who want to design a card can easily
interface it into ATLAS.
Plus this standard interface module (hardware and software requirements)
needs to be documented.

Alex, N3NP

----- Original Message ----
From: Lyle Johnson <kk7p at wavecable.com>
To: Alex <harvilchuck at yahoo.com>
Cc: Philip Covington <p.covington at gmail.com>; Christopher T. Day
<CTDay at lbl.gov>; hpsdr at hpsdr.org
Sent: Friday, May 12, 2006 11:40:24 AM
Subject: Re: [hpsdr] Operating Configurations

Alex wrote:
> At startup time we need to be able to have OZY know what is connected
to ATLAS and report it back to the host computer or to SASQUATCH. 
> 
> So would this be a sequencing at HPSDR connection time (host computer,
no SASQUATCH):
> 
> (1) Host computer queries OZY via USB for device descriptors
> (2) OZY queries the cards via the Dallas 1-wire interface for their
device descriptors (stored on each card)
> (3) OZY returns the device descriptors to the host computer
> (4) Host computer then transmits via USB the appropriate device
control 8051 code to be loaded into OZY's FX2 for operations (based on
the device descriptors returned)
> (5) OZY FX2 loads the received code, and activates the reset line for
the ATLAS bus 
> (6) All ATLAS cards reset and report ready status to OZY via I2C bus

I think the cards will all reset at the same time, including Ozy.  But 
Ozy can later configure things that need to be configured over JTAG, 
including asserting a reset to the device on the JTAG chain (FPGA, CPLD,

etc).

Also, I don't know that they will report status over I2C.  They could, 
of course, but they may or may not.  Ozy may infer this from the JTAG 
link, or over the SPI interface, or simply from its descriptor over the 
1-wire bus -- it may not require configuration and simply be ready when 
powered up, for example.

73,

Lyle KK7P






 1147455069.0


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