Re: [hpsdr] Ozy – Schematic OZY_REVXA4.sch (comments)

[Philip Covington]

On 5/18/06, Gerda & Kevin <g5rda at tiscali.co.uk> wrote:

> Phil, big update, great work, although I still don't understand the ATLAS_NRESET / ATLAS_X17C1 nets.
>
> I would have expected the reset to come from the FPGA, unless jumper 14 was installed enabling the reset to come from the Atlas bus. If this is the case the ATLAS_NRESET net should be connected to the fpga, pin 118 perhaps? Or is my logic fundamentally flawed??
>
> Kevin
> M0KHZ

Hi Kevin

The way it is connected now allows either the MCP130 to pull the
nReset line on the bus low or the FPGA pin connected to X17C1 to pull
nRESET low on the bus.   If the jumper is made then if the FPGA pulls
nRESET low (or something else on the bus) then FX2 will also be reset.
 If the jumper is not made the FPGA can reset whatever is on the bus
(or allow something on the bus to cause a nRESET) without causing the
FX2 to be reset also.

73 de Phil N8VB

 1147981168.0