[hpsdr] High Performance DDS Oscillator source

Gerd Loch g.loch at nt-electronics.de
Tue Aug 14 00:49:32 PDT 2007


I am working on a design with the AD9912 and I asked AD which combination of
clock generator frequency and clock multiplier is expected to give the
lowest jitter or phase noise.
The answer from AD was the best choice would be to use a 1 GHz sine
oscillator.

Any suggetions how to get an affordable 1 Ghz stable and "clean" sine
oscillator?

73 Gerd, DJ8AY




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