[hpsdr] HPSDR - Penelope update

[pvharman at arach.net.au]

All,

I’ve just updated the block diagram of Penelope on the Wiki

< http://hpsdr.org/wiki/index.php?title=PENELOPE#PENELOPE_-
_Companion_Transmitter_to_Mercury >

The latest block diagram reflects the current breadboard prototype. 

The performance looks very good.  Harmonic content is very low and DDS spurs 
are well below the FCC specifications. 

Carrier suppression and unwanted sideband suppression also seem excellent, at 
the moment the measurement is  limited by the dynamic range of my spectrum 
analyzer. 

I’ve also tested creating AM and FM in the FPGA rather then using the 11kHz 
signal from PowerSDR.  This seems to work fine and eliminates any image issues 
due  to imperfect I & Q  balance. 

Bill, KD5TFD, has modified PowerSDR to provide the RF envelope and carrier 
phase outputs that will be needed for a future  Envelope Elimination and 
Restoration (EER) power amplifier.  If anyone would like to assist in the 
development of such an amplifier please drop me an email. 

We are now moving to a prototype PCB which Lyle, KK7P, is designing. 

There is still a small window to add features so please review the latest block 
diagram and lets us have your ideas and suggestions ASAP. 

73's Phil....VK6APH 


 1170905906.0