[hpsdr] Is the Board going to REALLY be that expensive?

[Darrell Harmon]

> The problem is cost of prototypes and production, not the PCB
> software.   Check out the price of doing 6-10 layer boards with
> partial vias in small quantities.  With most of the BGA packages you
> need more than two signal layers in addition to the power and gnd
> layers.  Some of the BGA256 with 1mm balls can be done with four
> layers total, but that is more of an exception than the rule.
>
> Check out <http://dlharmon.com/dspcard/index.html> for an example of a
> four layer board with BGA.
>
> --
> Phil Covington
> Software Radio Laboratory LLC
> Columbus, Ohio
> http://www.srl-llc.com

Even with the 256 ball 17x17 mm full grid 1 mm pitch BGA parts, it is
not possible to break out all of the balls on a 4 layer board with
typical design rules.  With FPGAs, this means sacrificing some IO, but
with the fixed IO of a DSP, it may mean not being able to route a
critical net. I have done one design on a 4 layer board with a
Blackfin in an 0.8 mm pitch BGA, but it was the sparse BGA with a few
rows of missing balls. These missing balls really simplify layout.
Also, it seems to be possible to route many of the 0.8 mm pitch SDRAM
parts in 4 layers with 10 mil through vias.

I am planning to do a board in the near future with a Xilinx FG676
part (XC3SD1800A), but I will only break out a few hundred IO from the
outer rows. I have already drawn the 4 layer breakout of the part and
it seems to be quite possible. That is with 6 mil track and space, 15
mil through vias and 5 mil annular rings which result in affordable
prototypes.

Darrell Harmon

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