[hpsdr] Mercury Jumper info

[Scott Cowling]

Hi all,

Glad to see everyone having fun with Mercury!

The manual will be out shortly, but in the interim, here is an 
explanation of the jumper settings on Mercury.

73,
Scotty WA2DFI


Mercury Jumper Settings

JP1 - 122.88MHz clock select
short pins 1-2 (top): select external clock source
short pins 2-3 (bottom): select internal clock source (default)

NOTE: the external clock driver and receiver are enabled via FPGA 
outputs. Depending on the state of these enable outputs, just 
changing the jumper may not switch the clock source.


JP2 - MSEL2
short pins 1-2 (top): set MSEL2 high
short pins 2-3 (bottom): set MSEL2 low (default)


JP3 - MSEL1
short pins 1-2 (top): set MSEL1 high (default)
short pins 2-3 (bottom): set MSEL1 low


JP4 - MSEL0
short pins 1-2 (top): set MSEL0 high
short pins 2-3 (bottom): set MSEL0 low (default)


JP5 - I2C data bypass
short pins 1-2: connect Atlas bus A21 directly to CODEC (U16) MOSI pin
open pins 1-2: leave Atlas A21 and MOSI nets separate (default)

NOTE: See the schematic for and explanation of these connections. 
Installing this jumper connects two FPGA pins, Atlas pin A21 and the 
MOSI pin of the CODEC all together. This requires that the FPGA be 
programmed correctly to avoid conflicting outputs.


JP6 - I2C clock bypass
short pins 1-2: connect Atlas bus A20 directly to CODEC (U16) SCLK pin
open pins 1-2: leave Atlas A20 and SCLK nets separate (default)

NOTE: See the schematic for and explanation of these connections. 
Installing this jumper connects two FPGA pins, Atlas pin A20 and the 
SCLK pin of the CODEC all together. This requires that the FPGA be 
programmed correctly to avoid conflicting outputs.


JP7 - Last JTAG jumper
short pins 1-2: connect Atlas bus A25 (SDOBACK) directly to Atlas bus A27 (TDO)
open pins 1-2: leave Atlas A25 and A27 nets separate (default)

NOTE 1: this jumper is not required for normal operation
NOTE 2: Only *one* board should have this jumper installed. In order 
for the JTAG chain to work between boards, boards must be plugged 
into adjacent slots. Ozy must be in the lowest numbered slot, and the 
highest numbered slot must have the last JTAG jumper installed. Slots 
are connected in a JTAG loop as follows: 1->2->3->4->5->6->1. See 
Atlas board schematic for details.


JP8 - 10MHz osc pwr
short pins 1-2: enable 10MHz osc power
open pins 1-2: power down the 10MHz oscillator


JP9 - 122.88MHz osc pwr
short pins 1-2: enable 122.88MHz osc power
open pins 1-2: power down the 122.88MHz oscillator



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