[hpsdr] Cascading A/D Converters

[Steve Bunch]

On Aug 19, 2009, at 3:14 AM, alex wrote:

> ***** High Performance Software Defined Radio Discussion List *****
>
> no i think that it would work, you divide the 1ghz into 5 so you  
> have 40 mhz at 72 deg phase, so each adc did every 5th sample
>
> you would need a fpga that worked at 1ghz though

You should be able to take 5 samples in parallel into the FPGA on the  
last clock in the sequence -- it's got lots of I/O pins.  The earlier  
samples will be latched and waiting for you.  So at least you don't  
have to clock the data into the FPGA at 1GHz (though you still have to  
clock accurately -- a big enough challenge!).

As Alex observed in a later email, these are only 8-bit ADC's, and  
(especially being overclocked) may not even be delivering 8 bits of  
resolution.  For a scope with a small screen, it's probably just fine  
since the vertical height is probably not more than 256 pixels anyway  
and the pixels will be small, so small errors won't be noticed.  With  
a bit of smoothing, it should look just fine.  If you were just  
watching for signals in a fairly empty area of spectrum (that is, not  
much dynamic range), or looking only at strong signals, 8 bits might  
be enough.  For a general-purpose communications receiver, 8 bits is  
not enough dynamic range.

If you don't mind that it's not continuously sampled (e.g., for a  
spectrum scanner), you could use a single 16-bit ADC, putting switched  
bandpass filters in front of it, and step through 50 MHz chunks of  
spectrum quickly, undersampling with the ADC.  With the LTC2208, you  
could get up to at least 300MHz that way, with increasing degradation  
in accuracy with each higher band -- and unfortunately, with at least  
a half dozen challengingly-difficult bandpass filters.  So it's not a  
simple project, though if you only wanted a few specific sub-bands  
(e.g., ham bands), you would only need a couple of much simpler  
filters, and it looks more interesting (there are some folks doing  
this for 2M with their HPSDR's, I understand).  The advantage of that  
approach is that you'd then be able to demodulate anything you found  
interesting, and even though you won't get a full 16 bits of dynamic  
range and accuracy (you don't anyway... more like 14 at baseband)  
you'd still be getting well over 8 bits.  You'd want to compare this  
with just putting a downconverter in front of your ADC, which might be  
simpler and work better.  Hmm... isn't that basically what Cyclops  
does?  :-)

Steve, K9SRB


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