[hpsdr] Clock Jitter on C16

[Gerd Loch]

Hi,

I have done some tests on the 10 MHz clock "jitter" which causes problems
dependent on the placement on the Atlas bus.

I have uploaded the pictures on hamsdr.
http://www.hamsdr.com/personaldirectory.aspx?id=948


1) shows the clock on C16 when you have selected Penelope as 10MHz source.
2) shows the 12.288MHz signal on the panadapter when you have selected
Penelope as 10MHz source.
3) shows the clock on C16 when you have selected Mercury as 10MHz source and
configured 3.0LVTTL for the clock output pin.
4) shows the 12.288MHz signal on the panadapter when you have selected
Mercury as 10MHz source and configured 3.0LVTTL for the clock output pin.
5) shows the clock on C16 when you have selected Mercury as 10MHz source and
configured 3.0LVCMOS for the clock output pin.
6) shows the 12.288MHz signal on the panadapter when you have selected
Mercury as 10MHz source and configured 3.0LVCMOS for the clock output pin.

I do not really understand why a pin configuration LVTTL gives a very
different signal shape compared to LVCMOS.

However since the debounce is implemented in the Mercury code by Phil there
is no more difference on the 12.288 MHz clock whatever pin configuration is
used for the 10MHz output pin.

73, Gerd
DJ8AY