[hpsdr] Mercury SSB Phase Noise Testing

[John Miles]

>
> Larry and all:
>
> Actually, there is a "DDS" in Mercury, it is a CORDIC implemented in the
> FPGA, so no physical chip to see, other than the FPGA, and no
> manufacturer's spec sheet to read, other than the FPGA source code
> on the SVN.  It generates a "local oscillator" signal and associated 90
> degree
> shifted signal anywhere from 1 Hz to 60 MHz, used to do the mix-down
> conversion
> to the baseband.  It is locked to the 10 MHz reference signal on the
> Atlas Bus.

Right, but that virtual-LO signal is ultimately based on the FPGA clock.  In
terms of random PM noise, there is no difference between a CORDIC rotator on
an FPGA and an actual DDS chip driving a separate mixer.  They are both
limited by either the master clock noise or (more likely at HF) the noise
inherent to the semiconductor process floor.

-- john, KE5FX


 1256592746.0