[hpsdr] Hermes schematics

[Phil Harman]

All,

As Kevin has recently advised, the schematic for Hermes is available for 
peer review on the HPSDR Wiki here:

< http://openhpsdr.org/wiki/index.php?title=HERMES >

The preparation of the schematic has been a Herculean effort by  Tony Taylor 
who is also about to design the PCB. I like to thank Tony for all the work 
he has done to date and the effort he is about to undertake on the PCB.

Tony has been ably assisted by  Kevin M0KHZ and yours truly. I'd also 
particularly like to reconise the contributions by Graham KE9H in relation 
to the low power Tx stages, changes to the grounding of the Mercury front 
end and his Exchalibur 10MHz clock driver.

Hernes looks like it will be a most exciting HPSDR developemt having the 
following features:

- Single board DDC/DUC HF full duplex transceiver
- Mercury type DDC receiver with 10dB NF and coverage of  10kHz to 55MHz
- Multiple independant receivers (from the same antenna) - 4 currently 
planed
- Penelope type DUC transmitter with 0.5w output from 160m to 6m
- USB2 interface to PC with new Windows and Linux DSP software (to be 
announced)
- Direct connection to Alex board HPF/LPF filters and Tx/Rx switching
- Direct connection to an alternative LPF filter + 20W PA + Tx/Rx board ( to 
be announced)
- 13.5v DC input
- All clocks phase coherent to a high performance 122.88MHz reference 
oscillator
- Option for external 10MHz reference
- High capacity Altera 3C40 FPGA for current and future enhancements and 
features
- On board  Altera  USB Blaster clone for FPGA programming

Hermes represents one of the most complex and feature rich HPSDR projects we 
have so far tackled.

You can make a valuable contribution to the success of Hermes by very 
carefully checking the schematic on the Wiki.

Feedback and comments are welcomed via the reflector.

73's Phil...VK6APH



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