[hpsdr] Looking for the Verilog source of Ozy_Janus.v12
roland etienne
roland.etienne at free.fr
Sun Feb 7 09:45:56 PST 2010
Hi Bill,
Thanks a lot, this is first class support!!!
73,
Roland F8CHK
-----Message d'origine-----
De : Bill Tracey [mailto:bill at ewjt.com]
Envoyé : dimanche 7 février 2010 18:38
À : roland etienne; 'HPSDR Reflector'
Objet : Re: [hpsdr] Looking for the Verilog source of Ozy_Janus.v12
Hi Roland:
The source for Ozy_Janus.v12.rbf is SVN level 970
of svn://206.216.146.154/svn/repos_sdr_hpsdr/trunk/OzyV2-JanusV2
The FX2 code matching that is: level 953 of
svn://206.216.146.154/svn/repos_sdr_hpsdr/trunk/OzyFX2
Good luck on your project.
Cheers,
Bill (kd5tfd)
At 11:30 AM 2/7/2010, roland etienne wrote:
>***** High Performance Software Defined Radio Discussion List *****
>
>
>Hi everyone,
>
>I am playing with a simple transceiver, using Ozy, Janus, and a
>softrock TxRx v6.3, associated with a SI570. I have modified
>PowerSDR to program the SI570 via I2C, via Ozy, this is working
>fine. Now I need a PTT out from Ozy and I want to use the GPIO
>connected to pin 1 of the DB9. So I need to modify
>Janus_Ozy.v12.rbf , but I can't find the Verilog source, could you
>point me to the SVN address?
>
>Thank you,
>
>Roland, F8CHK
1265564756.0
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