[hpsdr] Diversity reception w/dual Merc boards

[Joe Martin K5SO]

Hi Gerd,

Interesting.  To answer your question, the nRx program will certainly  
run with the Mercury FPGA code configured for only 1 receiver but VFO  
B on the Mercury boards will not be available in such a case.  The nRx  
FPGA code in Mercury v3.0 is set up to be able to handle 4 receivers  
as I recall, making the size of the FPGA code that is loaded for that  
default version quite large.

In the FPGA code I use for my diversity program I limit the number of  
receivers configured in the FPGA to 2 on each Mercury FPGA (localparam  
NR=2, in the Verilog code) in order to keep the amount of code that  
gets stuffed into the FPGA as small as I can (and to keep the Quartus  
II compile time down!).

As a test to see if the FPGA timing is actually the issue for you, you  
certainly can compile  a version with NR=1;  actually I have a test  
version already compiled with NR=1 that I called Mercury v6.1 and can  
put that on my download site if you wish, or you can create the .jic  
file yourself from the Altera Quartus II program) to see if such a  
version will run okay with your 196 MHz clock speed.

I'd be very interested to hear of any results that you observe by  
doing such a thing.  Let me know if you want me to put the Mercury  
v6.1 test code .jic file (w/ localparam NR set to 1) on my site for you.

73,  Joe K5SO

On Oct 26, 2010, at 4:23 AM, Gerd Loch wrote:

> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Joe,
>
> Is it neccessary to have MercuryNRx with two or more Rx activated in  
> the
> firmware or would it also run with only 1 Rx configurated in the FPGA
> code from W1BC?
> The diversity receiption is running on two differnt hardwares.  
> Therefore
> I could imagine that it does not matter how many Rx are configured in
> the MercuryNRx code.
>
> I ask this question because I would like to have 2 boards running at a
> clock speed of 196 MHz for diversity receiption. However a code with
> more than 1 Rx is not running on the current FPGA at 196 MHz due to
> timing problems.
>
>
> 73, Gerd
> DJ8AY
>
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