[hpsdr] phase coherent timing (clocking)

[John Petrich]

All,

 

The approach that Joe, K5SO, has published to achieve phase coherent timing
of multiple Mercury receivers also applies to achieving phase coherent
timing of an Penelope/Pennylane and Mercury HPSDR transceiver.  In this
particular situation, using Power SDR and Joe's web based directions, one
should set Penelope/Pennylane as the "master" clock source and set Mercury
as the "slave" clock recipient.  It is necessary to link the two modules via
the LVDS interface.  In the case of the Mercury module for this application,
do not apply the jumpers on J5 (GPIO).  Those jumpers are only needed for
multiple Mercury applications, not this application.

 

What is accomplished with this modification?  For the first time ever with
my HPSDR transceiver, TX and RX, are on the exact same frequency.  Makes me
feel good all over.

 

John Petrich, W7FU

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