[hpsdr] one Metis down...

[Graham / KE9H]

Joe:

Well, either you can't program the EEPROM, or something is preventing the FPGA
from reading the EEPROM, or the EEPROM itself is bad.

So, there are only a few passive parts, and the EEPROM itself, that could be the 
problem.

--- Graham

==

On 2/20/2011 9:40 AM, Joe Martin K5SO wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
>
>
> New information:
>
> 1)  I am able to restore operation of the Metis board by using a USB-Blaster 
> cable (ASIC Terasic Blaster cable) by attaching the blaster cable onto the 
> JTAG header and targeting the Metis.sof file to load code into the Metis FPGA 
> directly through the JTAG header with the Quartus II Programmer in JTAG mode 
> and with JP1 in place on the Metis board.
>
> 2)  After restoring operation, the board will operate normally if you remove 
> JP1 while the board is running until the Metis board is power cycled.  Upon a 
> power cycling of the Atlas bus the Metis board does not come up (no status 
> LEDs lit, only the four power supply LEDs come on).
>
> This Metis  board is unable to come up in a normal manner once power has been 
> removed from it.
>
> Hints?
>
> 73,  Joe K5SO
>
>
>
>
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