[hpsdr] Problems compiling FPGA-Code for mercury-EU

[wully]

Hi all

Joe Martin and I are trying to compile the FPGA-Design for Version 6.3 
Diversity Receiption for the pin layout of Mercury-EU. But since there 
are very different pin assignments for this design, the compilation 
fails in the fitter

Here are the Messages:
Info: Fitter converted 10 user pins into dedicated programming pins
     Info: Pin ~ALTERA_ASDO_DATA1~ is reserved at location 12
     Info: Pin ~ALTERA_FLASH_nCE_nCSO~ is reserved at location 14
     Info: Pin ~ALTERA_DCLK~ is reserved at location 23
     Info: Pin ~ALTERA_DATA0~ is reserved at location 24
     Info: Pin ~ALTERA_DATA2~ is reserved at location 218
     Info: Pin ~ALTERA_DATA3~ is reserved at location 219
     Info: Pin ~ALTERA_DATA4~ is reserved at location 221
     Info: Pin ~ALTERA_DATA5~ is reserved at location 226
     Info: Pin ~ALTERA_DATA6~ is reserved at location 231
     Info: Pin ~ALTERA_DATA7~ is reserved at location 232

and then come the errors:

Error: Can't place multiple pins assigned to pin location Pin_221 
(IOPAD_X18_Y34_N0)
     Info: Pin Channels_8_1 is assigned to pin location Pin_221 
(IOPAD_X18_Y34_N0)
     Info: Pin ~ALTERA_DATA4~ is assigned to pin location Pin_221 
(IOPAD_X18_Y34_N0)
Error: Can't place multiple pins assigned to pin location Pin_226 
(IOPAD_X16_Y34_N14)
     Info: Pin Merc_ID_drv[0] is assigned to pin location Pin_226 
(IOPAD_X16_Y34_N14)
     Info: Pin ~ALTERA_DATA5~ is assigned to pin location Pin_226 
(IOPAD_X16_Y34_N14)
Error: Can't place multiple pins assigned to pin location Pin_231 
(IOPAD_X14_Y34_N14)
     Info: Pin Merc_ID_drv[1] is assigned to pin location Pin_231 
(IOPAD_X14_Y34_N14)
     Info: Pin ~ALTERA_DATA6~ is assigned to pin location Pin_231 
(IOPAD_X14_Y34_N14)
Error: Can't place multiple pins assigned to pin location Pin_232 
(IOPAD_X14_Y34_N21)
     Info: Pin Merc_ID[2] is assigned to pin location Pin_232 
(IOPAD_X14_Y34_N21)
     Info: Pin ~ALTERA_DATA7~ is assigned to pin location Pin_232 
(IOPAD_X14_Y34_N21)
Error: Can't fit design in device
Error: Quartus II Fitter was unsuccessful. 5 errors, 2 warnings
     Error: Peak virtual memory: 204 megabytes
     Error: Processing ended: Thu Jan 20 09:42:42 2011
     Error: Elapsed time: 00:00:16
     Error: Total CPU time (on all processors): 00:00:14
Error: Quartus II Full Compilation was unsuccessful. 7 errors, 73 warnings

The used version is Quartus 9.1sp2.
I assume, that one can configure Quartus in such a way, that these 
errors don't occur. But I don't know how to do that.

Any suggestions are welcome

73, HB9EPU