[hpsdr] Penny FPGA Load

[Joe Martin K5SO]

Bob,

Pete is correct, except that also the slot positioning criteria also  
holds for programming via Ozy or Magister using the old USB method of  
updating the FPGAs too, not only with HPSDR Programmer with Metis.

If you load the FPGA via a Blaster cable and the Quartus II Programmer  
program then you may do that directly to the header connection on the  
target board without regard to slot or other boards on the bus.

When operating after the firmware is loaded you may put the boards in  
any order and in any slot on the Atlas bus you desire, as Pete  
mentioned.

Your audio drop outs are a different problem entirely.  To check that  
the correct firmware was actually loaded check the firmware version  
reported by PowerSDR in the Setup > HPSDR menu, but the version has  
nothing to do with your audio drop out problem.  Sometimes you can  
cure audio drop out problems by changing the sampling rate and buffer  
size specified in the Setup > Audio menu, using lower values.   For  
me, using Metis cured my drop out issues entirely regardless of  
sampling rate or buffer size.  Sometimes when using Ozy (USB) instead  
of Metis (Ethernet) here I must adjust the buffer size to something  
less than 1024 to obtain drop-out-free behavior.

Try adjusting the sampling rate to a lower value and/or the buffer  
size to a lower value to see if that helps your drop out problem.

73,  Joe K5SO

On Jul 14, 2011, at 4:14 PM, n3evl wrote:

> Bob,
>
> Just to be clear, the discussion on board positioning etc is only  
> applicable to the operation of programming the boards via HPSDR  
> Programmer; for normal operation the board positions are arbitrary,  
> at least that's my understanding and experience.
>
> Pete, N3EVL
>
> On 7/14/2011 5:53 PM, Bob G Mahrenholz wrote:
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> Joe,
>>
>> I followed the "Windows Quick Startup Guide" and it said to install
>> Mercury in Slot J5 and Ozy (Magister for me) in Slot J2 - not quite
>> adjacent.
>>
>> PowerSDR runs but I sometimes have trouble with dropouts - the
>> screen and audio stop for about a second. I wonder if that could
>> be my problem. I think I will change them as you say and see how
>> things work.
>>
>> Thanks, Bob
>>
>>  -----Original Message-----
>>> From: Joe Martin K5SO<k5so at valornet.com>
>>> Sent: Jul 14, 2011 2:16 PM
>>> To: hpsdr at lists.openhpsdr.org
>>> Subject: Re: [hpsdr] Penny FPGA Load
>>>
>>> ***** High Performance Software Defined Radio Discussion List *****
>>>
>>>> Phil:
>>>> What's valid for Magister and Mercury?
>>>> Thanks,Bob K4QQK
>>> Bob,
>>>
>>> Since Phil is probably in bed at this moment I'll answer your
>>> question.   The earlier discussion is the same for Magister and
>>> Mercury as it is for Metis and Mercury.
>>>
>>> Specifically, John's little table above also is correct for Magister
>>> if  you let "M" represent Magister and "T" represent Mercury.
>>>
>>> Your Mercury board needs to be adjacent to the PC interface board
>>> (Magister, in your case) with the Mercury board located between  
>>> the PC
>>> interface board and the power connector on the Atlas bus.  As long  
>>> as
>>> they are in that sequence you can put the two adjacent boards  
>>> anywhere
>>> on the Atlas bus that you like to do the FPGA loading into Mercury.
>>> The JTAG continuity will be maintained as long as Mercury is  
>>> adjacent
>>> to Magister and Mercury is between Magister and the power connector;
>>> the pair can be in any two slots on the bus as long as those two
>>> criteria are met.
>>>
>>>
>>> 73,  Joe K5SO
>>>
>>>
>>>
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