[hpsdr] Metis functionality
Maximo EA1DDO_HK1DX
ea1ddo at hotmail.com
Tue May 17 01:42:31 PDT 2011
Hi,
I agree with Alberto.
>From OpenHPSDR.org;
The HPSDR is an open source (GNU type) hardware and software project intended as a "next generation" Software Defined
Radio (SDR) for use by Radio Amateurs ("hams") and Short Wave Listeners (SWLs).
I came to HPSDR thinking that is was the "Next Generation" the "most advanced" SDR available for amateurs.
If we got the hardware (Metis 1000T, large FPGA, etc) I agree to let the options active to permit to the user to explore his (hardware) limits.
Don´t mistake my opinion about the developers team. They are all great and doing a great effort. But if there is a option, let´s everyuser to choose the limits.
Thank you
73, Maximo - EA1DDO
Date: Mon, 16 May 2011 23:05:21 +0200
From: i2phd at weaksignals.com
To: hpsdr at openhpsdr.org
Subject: Re: [hpsdr] Metis functionality
***** High Performance Software Defined Radio Discussion List *****
On 5/16/2011 4:00 PM, Jeremy McDermond wrote:
> The current FPGA code only allows three choices of sample rates, which determine the FIR used as well: 192000, 96000, 48000. The FIR is equal to the sample rate. This isn't to say it's set in stone. That's why there's an FPGA, so that we can modify these values as we learn more by experimentation.
Isn't this a bit limited ? Look at what the market offers... Perseus can send to the PC up to 2 MHz of sampled data,
the Qs1r has been
successfully tested by Phil C. with Winrad with a bandwidth of 4 MHz... a sampling rate of max 192 kHz is not very
much.... IMHO there
should be in the FPGA a programmable downsampler that gives the user the choice of the final data rate. I know, this
would imply to have
many different anti-alias FIR filters, but these can be easily downloaded on-the-fly to the FPGA.
Ozy has hardware limitations that prevent those high data rates, but hopefully Metis should be better in this respect...
The holy grail of the MWLs is the capability of recording to disk the I/Q data of the entire MW band, overnight, to be
then able, with leisure,
to check the day after which stations were present, checking at top of the hours their ID... and this capability needs a
bandwidth of 2MHz.
I know, the HPSDR is not especially meant for MWLs, but rather for experimenters, and I just am too sorry to know very
little of FPGA
programming, otherwise I would implement myself that capability... :-(
--
/*73 Alberto I2PHD*/
On 5/16/2011 4:00 PM, Jeremy McDermond wrote:
The current FPGA code only allows three choices of sample rates, which determine the FIR used as well: 192000, 96000, 48000. The FIR is equal to the sample rate. This isn't to say it's set in stone. That's why there's an FPGA, so that we can modify these values as we learn more by experimentation.
Isn't this a bit limited ? Look at what the market offers...
Perseus can send to the PC up to 2 MHz of sampled data, the Qs1r has
been
successfully tested by Phil C. with Winrad with a bandwidth of 4
MHz... a sampling rate of max 192 kHz is not very much.... IMHO
there
should be in the FPGA a programmable downsampler that gives the user
the choice of the final data rate. I know, this would imply to have
many different anti-alias FIR filters, but these can be easily
downloaded on-the-fly to the FPGA.
Ozy has hardware limitations that prevent those high data rates, but
hopefully Metis should be better in this respect...
The holy grail of the MWLs is the capability of recording to disk
the I/Q data of the entire MW band, overnight, to be then able, with
leisure,
to check the day after which stations were present, checking at top
of the hours their ID... and this capability needs a bandwidth of
2MHz.
I know, the HPSDR is not especially meant for MWLs, but rather for
experimenters, and I just am too sorry to know very little of FPGA
programming, otherwise I would implement myself that capability...
:-(
--
73 Alberto I2PHD
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