[hpsdr] VHF/UHF downconverter for HPSDR

Phil Harman phil at pharman.org
Sat Oct 1 21:59:19 PDT 2011


Hi Ante,

Your block diagram looks fine - a few suggestions.  There is already an I2C bus on the Atlas bus that will drive an Si570, I tested this when prototyping Cyclops and it works just fine.  So instead of the Atmeg uP you can use an I2C addressable latch to directly control the relays etc.  That would remove one source of potential digital noise off the board since I2C would only need to send data on a change of state. 

As I mentioned in a previous post I breadboarded your basic system using an ADF4350 instead of the Si570. The advantage of the ADF4350 is that it goes to 4.4GHz, the disadvantage is that the lowest frequency is about 137MHz and the phase noise at 1GHz is -100dBC at 1kHz.  The Si570 goes down to 3MHz in practice I think (not that you need a down converter below 55MHz) has gaps in its coverage and drifts.  The phase noise may be better.

With either solution you will need away to eliminate the images that will occur.  Analogue filters will be difficult in the uWave region but image subtraction in software may work quite well.

Please keep us updated as to your progress. 

73 Phil....VK6APH 


  ----- Original Message ----- 
  From: Ante Vukorepa 
  To: hpsdr at lists.openhpsdr.org 
  Sent: Sunday, October 02, 2011 4:52 AM
  Subject: Re: [hpsdr] VHF/UHF downconverter for HPSDR


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  On srijeda, 21. rujna 2011. at 23:18, Ante Vukorepa wrote:
    1) using Si570 (high grade LVDS version, if possible) as the LO to feed a high IP3 Mini Circuits frequency mixer, then filtering out the higher "image" with a 500MHz-ish low pass filter
    B1 is probably the best option for initial experimentation and my own (not very demanding) purposes. So that's the route i think i'll go, as soon as i catch some free time and start putting all this down on paper. My plan is to try and design a down converter consisting of fore-mentioned elements (Si570, frequency mixer, filter) plus a microcontroller, that would fit an Atlas card and would be controlled through the bus, via I2C. The vision is to have the ability to bypass and turn all the elements, including the microcontroller, off when not in use, so the impact on the existing HF signal chain is minimal.


  I've put together an initial block diagram for what i've had in mind:
  http://dl.dropbox.com/u/1702513/Block.png


  The board will be 2-layer if possible (to simplify and cheapify things initially), with one side dedicated almost purely to ground (separate analogue and digital ground planes, of course, perhaps even a completely separate plane for the Si570). Omron SMD signal relays will be used for pre-amp and filter bypassing and oven control (control in the sense of having it completely on or off, not in the sense of PWM). An Atmega168 or 328 will control both them and the Si570 providing the LO frequency. The Atmega will, in turn, be controlled via an I2C or SPI line, by the other boards on the bus, or manually, via a front control panel consisting of a rotary encoder, LCD and a few buttons. The balun is there to convert the differential Si570 CML output and suck out as much decibels as possible to feed a high IP3 frequency mixer. The (optional) FM broadcast band-stop filter is there to kill the interference from strong nearby FM towers, if needed.


  How am i doing so far?

  -- 
  Ante Vukorepa
  Sent with Sparrow






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