[hpsdr] New clock oscillator for OpenHPSDR?

[Helmut, DC6NY]

Right Brian! The quality of the sampling oscillator determines the SFDR of
the ADC besides resolution etc.  Phase noise is some kind of jitter. The
122,88 Mhz oscillator  acts as VCXO and the possible reduction of its native
phase noise by means of the loop reference is very limited.  The easier way
to improve the system (if even necessary) is to run the VCXO on twice
frequency and divide down by factor 2. So you gain 6 dB less phase noise.

 

73, Helmut, DC6NY

 

Von: Brian Lloyd [mailto:brian at lloyd.com] 
Gesendet: Freitag, 13. Dezember 2013 19:07
An: Helmut, DC6NY
Cc: Kjell Karlsen; hpsdr at lists.openhpsdr.org
Betreff: Re: [hpsdr] New clock oscillator for OpenHPSDR?

 

On Fri, Dec 13, 2013 at 10:52 AM, Helmut, DC6NY <dc6ny at gmx.de> wrote:

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Hi Kjell.

Thanks for information, but I see no direct chance for any substitution in
this 5V sine wave application. On the 10 MHz level phase noise hasn't been
an issue and concerning to the sampling frequency 122,88 Mhz I'm not sure
that the approx. 10 dB better phase noise can improve SFDR dramatically. But
it's interesting that a lot of suppliers meanwhile  discover phase noise a
determining factor of total system's performance.

 

Please correct me if I am wrong, but the loop filter at the output of the
phase comparator prior to the control input at the 122.88MHz master
oscillator effectively attenuates the phase noise from the 10MHz reference
thus preventing it from affecting system performance. I would expect the
native phase noise of the 122.88MHz master oscillator to dominate the phase
noise performance of the system. This would mean that a low-phase-noise
reference (GPSDO or Rb) is not that necessary.

 

Am I correct?

 

-- 

Brian Lloyd, WB6RQN/J79BPL
<http://www.catb.org/hacker-emblem/glider.png> 
706 Flightline Drive
Spring Branch, TX 78070
 <mailto:brian at lloyd.com> brian at lloyd.com
+1.916.877.5067

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