[hpsdr] Introducing a "Path Illustrator" feature

[Joe Martin]

Hi Scott, 

Thank you for the report.  Comments imbedded below:

On Dec 20, 2015, at 10:01 AM, Scott Traurig wrote:

> Hi Joe,
> 
> First, let me congratulate and thank you for starting the development of this fabulous and useful new feature! I am currently running v1.2.4.
> 
> Second, do you mind if I cross-post this to the Apach Labs forum (yahoo group)?
> 
No problem, post wherever you wish. 

> 
> OK, on to the feedback...Note that this is for a 100D with Rev 15/16 PA CCA.
> 
> - Problem: ADC enumeration starting at zero will be very confusing for many people.
> 
There has been confusion on this particular issue for quite some time with the origin stemming from the fact that in firmware all receiver modules are naturally numbered 0 through N due to the way that Verilog numbers array elements.  Unfortunately, if I change the ADCn labels in the hardware rectangle and the DDCn/Rxn labeling in PI within the FPGA rectangle it would be inconsistent with the nomenclature used in the Verilog source code and would prove to be quite confusing to new developers trying to learn how to code the FPGA.  In the PI diagrams I have used the PowerSDR nomenclature associated with the RX1 DISPLAY and RX2 DISPLAY to be consistent with what shows up on the PowerSDR main menu.   Basically, I have tried to be consistent in the PI diagram sections with what exists in both firmware and software source code, understanding that there will likely still be some confusion as a result. 

It was my hope that perhaps the users of PI can follow the lines in the diagrams to see what is connected to what and realize that the names in the diagram rectangles represent names that are used as labels on the hardware and as variables in the source code of the firmware/software components and displays in the software.  

> - Problem: no "bullets" or "dots" that show where lines actually connect per normal schematic drawing guidelines. Without these it can be confusing if lines are connected or are merely crossing.
> 
The scheme used in the PI diagrams is simple:  Crossing lines are not connected.  Lines that join each other but do not completely cross are connected.  

When in doubt about connections, and apparent “abstractions” in the PI diagrams that have omitted some actual detail in the schematics, one can always refer to the actual hardware schematics and hardware manuals, of course.

> - Comment: DDC2 is shown as connected to ADC0 and RX1 display. Same for DDC3 and RX2 display. If that's how it really works that is great to learn that! I thought DDC0 fed RX1 display and DDC1 fed RX2 display?
> 
Your thought was incorrect.  The connections of signals from DDC0 and DDC1 to the RX1 DISPLAY and RX2 DISPLAY depend upon several factors, including whether or not PureSignal/Diversity/etc are selected or not.  I believe the PI diagram to be correct on this.  Consider, for example, the case of diversity; in diversity the RX1 DISPLAY shows the result of combining signals from DDC0 and DDC1 into a single IQ stream for display on RX1 DISPLAY and shows signals from DDC2 on RX2 DISPLAY.  This statement is true for your hardware platform selection but not true on all hardware platforms, of course.

> I have not exhaustively tested PI, but just checking it against my current configuration I noted the following two issues:
> 
> - Problem: my system is configured for ADC1 to feed DDC1 (using PI enumeration) and, per the comment above, I suppose DDC3 is also connected to ADC1. However PI shows DDC3 connected to ADC0.
> 
I think you are being confused by the labeling schemes in firmware and software.  The connections of ADCn to DDCn is controlled by the selections you make in the PowerSDR Setup > ADC menu, as you know.  However, note that, as an example, RX1 in that menu corresponds to DDC0 (Rx0) in the FPGA rectangle of the PI diagram.  

> - Problem: muting on transmit for RX2 is not enabled in my configuration but it is shown that way in PI.
> 
This is a bug in the PI program, thank you for the report.  I will fix it. 

> Thank you again, Joe, for coming up with what will undoubtedly be a very important improvement in the program!
> 
> 73!
> 
> Scott/w-u-2-o
>