[hpsdr] Metis v3.0 fpga source code

[Ramakrishnan Muthukrishnan]

On 15/07/2020 18:09, Stijn Nestra wrote:
> Verilog and VHDL files are contained inside the .qar file. This is a Quartus archive.
> 

Thanks Stijn and John. Unfortunately I don't have access to a computer 
with Quartus tools installed. And it does not look like any other tool 
can unpack a qar file as it is a proprietary format.

It would be great if the actual files are checked into the repository 
for easy browsing of the source files.

73
Ram VU3RDD