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<DIV><FONT face=Arial size=2>All,</FONT></DIV>
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<DIV><FONT face=Arial size=2>Through the generosity of Phil N8VB I have access
to a pair of LT2208 evaluation boards. These consist of a DC854C board
that contains the LT2208 and a DC718B board that provides a USB 1 interface to
the PC. See <A href="http://www.linear.com">www.linear.com</A> for more
details on these boards. </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>The evaluation boards enable various performance
measurements to be made. The screen shot at </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2><<SPAN><FONT face=Verdana color=#0000cc
size=1><A
href="http://www.hamsdr.com/personaldirectory.aspx?id=284"><STRONG>http://www.hamsdr.com/personaldirectory.aspx?id=284</STRONG></A><FONT
face=Arial color=#000000 size=2>></FONT></FONT></SPAN></FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>is of the LT2208 being clocked at 100MHz from a low
noise crystal oscillator. The FFT shows the spectrum from 0 - 50MHz
using 4096 FFT bins and a Hann windowing function. The signal input is
at 25MHz from my HP8640B signal generator at +10dBm. The input amplifier
in the LT2208 is set for maximum gain which gives an input overload
of 1.5v and a noise floor of -86dBm in the above
FFT bandwidth. </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Sweeping the signal generator over 0 - 50Mhz does
show a significant number of spurious signals but I have no idea how LT are
doing the FFT so its a little early to speculate. Setting the input
frequency to an integer of the clock frequency yields a spurious free
display.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>At this stage all is looking good. In addition to a
possible front end for the HPSDR then spectrum analyser and digital oscilloscope
options look viable. </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Next I need to connect the DC854C board to an FPGA
so I can do tests in a narrower bandwidth. Given the functions that I will
need I'm not sure this will fit in the Xylo board so further development may
have to wait for the Ozy board. I have the Verilog code running in simulation
mode for the NCO and multipliers and am about to start designing the CIC filter.
</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>Any suggestions for additional tests to do using
the evaluation boards are welcome. </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>73's Phil... VK6APH </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
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