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<DIV><FONT face=Arial size=2>HI Guido,</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>This is a really good suggestion. I also understand
that the noise due to fraction N is removed by the LPF response of the PLL by
moving the noise to the high end of the spectrum. If there was a way to
remove the noise without the need for a PLL this would be a real
breakthrough.</FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2>73's Phil...VK6APH </FONT></DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
<DIV><FONT face=Arial size=2></FONT> </DIV>
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<DIV style="FONT: 10pt arial">----- Original Message ----- </DIV>
<DIV
style="BACKGROUND: #e4e4e4; FONT: 10pt arial; font-color: black"><B>From:</B>
<A title=threeme3@gmail.com href="mailto:threeme3@gmail.com">Guido</A> </DIV>
<DIV style="FONT: 10pt arial"><B>To:</B> <A title=hpsdr@hpsdr.org
href="mailto:hpsdr@hpsdr.org">hpsdr@hpsdr.org</A> </DIV>
<DIV style="FONT: 10pt arial"><B>Sent:</B> Sunday, June 18, 2006 4:49 AM</DIV>
<DIV style="FONT: 10pt arial"><B>Subject:</B> Re: [hpsdr] Horton LO</DIV>
<DIV><BR></DIV>***** High Performance Software Defined Radio Discussion List
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<P></P>Bob, this is a very interesting thought. Still trying to get the
complete idea.<BR><BR>Artie, fractional spurs may be compensated by noise
shaping in case of a phase-lock loop. The higher the order delta sigma
modulators, the more the fractional spur energy (quantization noise) is moved
from the phase-lock loop band towards a higher frequency. <BR><BR>Assume that
there is no phase-lock loop in Bobīs Horton LO idea: There is just a stable
crystal clock which is divided by a fractional-N, where the output is fed to a
QSD for mixing. Would it still be possible to noise shape in order to
compensate for the fractional spurs ? <BR><BR>Guido.<BR><BR>
<DIV><SPAN class=gmail_quote>On 6/17/06, <B class=gmail_sendername>Arthur J.
Lekstutis</B> <<A
href="mailto:Artie@lekstutis.com">Artie@lekstutis.com</A>> wrote:</SPAN>
<BLOCKQUOTE class=gmail_quote
style="PADDING-LEFT: 1ex; MARGIN: 0pt 0pt 0pt 0.8ex; BORDER-LEFT: rgb(204,204,204) 1px solid">*****
High Performance Software Defined Radio Discussion List
*****<BR><BR>Hi,<BR><BR>I can't keep up with you guys as I'm too busy with
other projects at the<BR>moment, so I mostly lurk on this list. Perhaps I
misunderstand or missed <BR>an email some place.<BR><BR>Wouldn't a purely
digital "fractional N" divider generate significant<BR>spurs? The duration
of any digital signal from a synchronous device<BR>must, by definition, be
multiples of the clock cycle. Trying to get <BR>around this with a
fractional N divider will result in uncertainty of<BR>the desired output of
approximately the clock period. The jitter would<BR>equal the clock period,
the magnitude would depend on the current<BR>fraction. I would expect spurs
from that. Or am I missing something? <BR><BR>Adding a random number
generator to a fractional N divider to choice<BR>when to switch from one
frequency to another (which is what I think a<BR>fractional N divider
basically does) might spread out the spurs out, but <BR>they'll still be
there.<BR><BR>I think you need to be happy with an integer divider, or
introduce an<BR>analog PLL, if you want to minimize noise.<BR><BR>Back to
lurking....<BR><BR>Later,<BR>Artie Lekstutis<BR>KC2MFS<BR><BR><BR>>*****
High Performance Software Defined Radio Discussion List
*****<BR>><BR>>Guido:<BR>><BR>>Doing all of this fractional
stuff digitally and never having to convert<BR>>back to analog is a big
win, a huge win. The facts are the fractional <BR>>N, without
having to go back to analog, but retaining an all digital<BR>>character
is a huge win since we remove tons of nastiness due to<BR>>attempting to
produce analog waveforms. Our ULTIMATE resolution should
<BR>>by a 2^16 word size and in this case that is 2.5 kHz. It
is going to be<BR>>a big
win.<BR>><BR>>Bob<BR>><BR>><BR>><BR><BR><BR>_______________________________________________<BR>HPSDR
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