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<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>Francis-<o:p></o:p></span></font></p>
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10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>You are correct, the ATLAS bypass scheme
is definitely not the best for fast rise-time, high frequency signals. It was a
compromise design due to the limited # of layers utilized in the layout due to
$ considerations.<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>I’m not sure any amount of
optimizing the decap escapes is going to make it ‘high performance’
with regards to decoupling simply because of the lack of a VCC plane.<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>The thing that makes the ATLAS viable even
though the bypassing isn’t all that great is the fact that there will be
good (we hope) bypassing on the application boards plugged into the backplane
buss (ATLAS). As long as the decoupling on the application boards is decent the
current consumers (FPGA’s, ASICS, etc.) will see a low impedance current
source and be happy. The decoupling on the ATLAS merely provides a reservoir of
charge for low frequency demands.<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>73, Ray WB6TPU<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
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<p class=MsoNormal><b><font size=2 face=Tahoma><span style='font-size:10.0pt;
font-family:Tahoma;font-weight:bold'>From:</span></font></b><font size=2
face=Tahoma><span style='font-size:10.0pt;font-family:Tahoma'> FRANCIS CARCIA
[mailto:carcia@sbcglobal.net] <br>
<b><span style='font-weight:bold'>Sent:</span></b> Thursday, July 06, 2006 8:54
AM<br>
<b><span style='font-weight:bold'>To:</span></b> Ray Anderson<br>
<b><span style='font-weight:bold'>Subject:</span></b> RE: [hpsdr] bypass caps</span></font><o:p></o:p></p>
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12.0pt'><o:p> </o:p></span></font></p>
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<p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:
12.0pt'>Ray,<o:p></o:p></span></font></p>
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<p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:
12.0pt'>I agree when you have 2 planes. I noticed the caps along the side of
Atlas and thought we might look closer to this as RF boards are designed.
fc. <br>
<br>
<b><i><span style='font-weight:bold;font-style:italic'>Ray Anderson <<st1:PersonName
w:st="on">ray.</st1:PersonName>anderson@xilinx.com></span></i></b> wrote:<o:p></o:p></span></font></p>
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<o:p></o:p></span></font></p>
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