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<DIV><FONT face=Arial size=2>Hello All,</FONT></DIV>
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<DIV><FONT face=Arial size=2>Together with Ramkrishnan(VU3RDD) iam working
on design an ISD based receiver by using 180 degree
switches.</FONT></DIV>
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<DIV><FONT face=Arial size=2>The idea is to make use of an NCO implemented in
the ozy FPGA and controlled via powersdr (realized).</FONT></DIV>
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<DIV><FONT face=Arial size=2>In the attachment you will find a scheme which will
be used for further experiments (different configuration options can be set by
jumpers). It contains an balanced and unbalanced exit.</FONT></DIV>
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<DIV><FONT face=Arial size=2>But after reading some previuos mails i think we
should an additional buffer for low impedance output!</FONT></DIV>
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<DIV><FONT face=Arial size=2>Goodluck,</FONT></DIV>
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<DIV><FONT face=Arial size=2>73 Johan PA3GSB</FONT></DIV>
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