<html><head><style type="text/css"><!-- DIV {margin:0px;} --></style></head><body><div style="font-family:times new roman,new york,times,serif;font-size:12pt">In the svn repository, Mercury 2.7 directory, file Mercury.fit.rpt says (trimmed):<br><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;"><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;"><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;"><div><br>; Fitter Summary <br><br>; Fitter Status Successful - Mon
May 18 19:06:55 2009<br>; Quartus II Version ; 9.0 Build 132 02/25/2009 SJ Web Edition ;<br>; Revision Name ; Mercury <br>; Top-level Entity Name ; Mercury<br>;
Family ; Cyclone III <br>; Device ; EP3C25Q240C8<br>; Timing Models ;
Final<br>; Total logic elements ; 9,653 / 24,624 ( 39 % ) <br>; Total combinational functions ; 7,828 / 24,624 ( 32 % )<br>; Dedicated logic registers ; 7,470 / 24,624 ( 30 % )<br>; Total
registers ; 7470<br>; Total pins ; 61 / 149 ( 41 % )<br>; Total virtual pins ;
0<br>; Total memory bits ; 84,380 / 608,256 ( 14 % )<br>; Embedded Multiplier 9-bit elements ; 22 / 132 ( 17 % )<br>; Total PLLs ; 0 / 4 ( 0 %
) <br><br>More detail is there in the rest of the report - search down for "Fitter Resource Utilization by Entity". It looks like the receiver entity is about 80% of the total gates. So there's room for one or maybe barely two more identical receivers without any material change to the receiver design. With some optimization, like using NCO's that use COS lookup and interpolation instead of CORDIC to take advantage of the unused memory and multipliers (Xilinx's library NCO cell does this, I haven't looked at Altera's), or changing the performance specs of secondary receivers to use fewer filter resources, you could probably get more than that.<br><br>The other cards are also in the SVN, have a look!<br><br>Steve, K9SRB<br></div><div style="font-family: times new roman,new york,times,serif; font-size: 12pt;"><br><div style="font-family: arial,helvetica,sans-serif; font-size: 13px;"><font size="2" face="Tahoma"><hr size="1"><b><span
style="font-weight: bold;"></span></b></font><br>2009/8/3 alex <<a rel="nofollow" ymailto="mailto:ajbr@btconnect.com" target="_blank" href="mailto:ajbr@btconnect.com">ajbr@btconnect.com</a>>:<br>><br>> i thought we were running out of room in the fpga (which is why i suggested<br>> it so that we could possibly get 90% of the performance of 10 rx's with a<br>> fraction of the fpga power used up)<br>><br>> yes if there is enough fpga space and enough computer power then multiple<br>> rx's would be better<br><br>This begs the question: How much FPGA space is currently used/free on<br>Mercury and/or the other cards?<br><br></div></div></div></div></div></div></body></html>