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Kirk Weedman wrote:
<blockquote cite="mid:4A8AC863.9030502@hdlexpress.com" type="cite">
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<font color="#990000">Yes, all processing on the PC has a lot of
"jitter" as far as how it gets the data processed, but that doesn't
matter. <br>
The amount of time (assuming its faster than the data needs of
the USB chip/FPGAs on Ozy) and method (5 interrupts or 50 interrupts)
<br>
on the PC doesnt matter, just as long as you keep the bucket with the
hole in the bottom filled so it doesn't empty or overflow. <br>
Its how the
data was obtained in the FPGA that matters so that things like FFT's,
etc. can be done with precision on the PC. <br>
The PC's job is "merely"
(I say this with utmost respect since it does a ton of processing), is
to get the data at any speed/sample size it likes, <br>
process it, and send
data back at the rate required to keep the FPGA FIFOs happy. Hopefully
I've made this as clear as mud....<span class="moz-smiley-s1"><span>
:-) </span></span><br>
OK..fire at me at random...<br>
</font></blockquote>
Hi Kirk,<br>
<br>
your mud is clear indeed <span class="moz-smiley-s1"><span> :-) </span></span>Seriously,
you confirmed me that the jitter I feared does as a matter of fact
exist, but<br>
is of no consequences... and, now that you have explained the things, I
can also understand why.<br>
I was skeptic a bit myself of what I feared, as I am able to see that,
despite all, DRM gets decoded beautifully, with<br>
a S/N ratio near to 30 dB (using DReaM 1.10.6). But nevertheless I
exposed my doubts, at the risk of making me<br>
ridiculous, as the worst doubts are those that get no explanations, in
a way or another.<br>
<br>
Ok, back to the compiler IDE to continue the work.. <span
class="moz-smiley-s1"><span> :-) </span></span><br>
And thanks for your answer.<br>
<br>
73 Alberto I2PHD<br>
<br>
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