<div dir="ltr">I opened the Hermes_Lite project in Quartus and appears it has the pieces required for VNA mode. It's worth a try.<div><br></div><div>The FPGA is 71% full and may even have enough room for the second receiver instance.</div>
<div><br></div><div><br></div><div><div class="gmail_extra"><div class="gmail_quote">On Tue, Apr 15, 2014 at 5:50 PM, <span dir="ltr"><<a href="mailto:rodwall1234@gmail.com" target="_blank">rodwall1234@gmail.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left-width:1px;border-left-color:rgb(204,204,204);border-left-style:solid;padding-left:1ex"><div class=""><div class="h5">***** High Performance Software Defined Radio Discussion List *****<br>
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<div dir="ltr" style="font-family:Calibri,'Segoe UI',Meiryo,'Microsoft YaHei UI','Microsoft JhengHei UI','Malgun Gothic',sans-serif;font-size:12pt"><div><div>Hi Steve,</div><div><br></div>
<div>I guess that if Herms Lite is firmware/software compatible with it’s big brother. I t can also be used as a VNA? At $150.00 for the hardware makes it a cheap VNA. Can Hermes Lite be used as a VNA?</div><div><br></div>
<div>Thanks,</div><div><br></div><div>Roderick Wall, vk3yc.</div><br></div><div><div><font face=" 'Calibri', 'Segoe UI', 'Meiryo', 'Microsoft YaHei UI', 'Microsoft JhengHei UI', 'Malgun Gothic', 'sans-serif'" style="line-height:15pt;letter-spacing:0.02em;font-family:Calibri,'Segoe UI',Meiryo,'Microsoft YaHei UI','Microsoft JhengHei UI','Malgun Gothic',sans-serif;font-size:12pt"><b>From:</b> <a href="mailto:steve@softerhardware.com" target="_blank">Steve Haynal</a><br>
<b>Sent:</b> Tuesday, 15 April, 2014 2:02 PM<br><b>To:</b> <a href="mailto:hpsdr@openhpsdr.org" target="_blank">hpsdr@openhpsdr.org</a></font></div></div><div><br></div><div dir=""><div dir="ltr"><div>Hello All,</div>
<div><br></div><div>I've read the comments and questions on the Hermes Lite and tried to capture my responses below.</div><div><br></div><div>* The jumper on the FPGA board selects whether the FPGA board is powered through the 80-pin connector or USB. This jumpered signal does run to the daughter board and in the next versionn should be controlled by the daughter board. There is a github issue recorded for this.</div>
<div><br></div><div>* The prototype has extra jumpers to provide flexibility to try different things. The next version of the PCB can reduce the number of jumpers.</div><div><br></div><div>* The power output is theoretically 100 mW, and even 200 mW if you tolerate some distortion. If have tested up to 50 mW as shown in the WSPR spots. I couldn't go up to 100 mW because I did not have a binocular core of the right size on hand to get the proper turns ratio. Eventually, I'd like to see a small amp integrated to make this more like a RXTX Ensemble.</div>
<div><br></div><div>* I agree that this project is not ready for general use as it is. Only the bravest should attempt to build the current version! I put it out there to see what would happen. Who knows what others can and will do... I have tried to capture everything I can think of that needs to be fixed/improved in the online github project issues list.</div>
<div><br></div><div>* There are unused pins from the FPGA that connect to the unused PCIE-like connector. These can be repurposed to provide some I/O and control in a next version. </div><div><br></div><div>* Thanks to Rob, KL7NA, for keeping the demo going.</div>
<div><br></div><div>73,</div><div><br></div><div>Steve </div><div>KF7O</div><div><br></div></div>
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