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<DIV>All,</DIV>
<DIV> </DIV>
<DIV>There is new FPGA code available for a number of openHPSDR based
boards. The new releases are: </DIV>
<DIV> </DIV>
<DIV>Ozy_Janus_v2.7<BR>Metis_v2.9<BR>Hermes_v2.8<BR>Angelia_v3.5<BR>Orion_v2.4</DIV>
<DIV> </DIV>
<DIV>The Ozy_Janus code will automatically be included in the next release of
PowerSDR which will occur shortly.</DIV>
<DIV> </DIV>
<DIV>The Metis and Hermes code can be obtained from here:</DIV>
<DIV> </DIV>
<DIV><A title=http://openhpsdr.org/download.php
href="http://openhpsdr.org/download.php">http://openhpsdr.org/download.php</A></DIV>
<DIV> </DIV>
<DIV>Joe, K5SO, will announce the availability of Angelia and Orion code
shortly.</DIV>
<DIV> </DIV>
<DIV>This new code moves all CW RF, Sidetone and Keyer logic into the FPGA in
order to eliminate any delays from a CW key press to Sidetone generation. It
also immediately applies the selected level of receiver input attenuation, when
transmitting, to eliminate momentary ADC Overload warnings.</DIV>
<DIV> </DIV>
<DIV>Since CW RF generation is implemented in the FPGA then, apart for
user selectable delays on key closure and release, RF generation is
instantaneous.</DIV>
<DIV> </DIV>
<DIV>In the accompanying new release of PowerSDR there are two user adjustable
delays associated with the new CW code. These are located on the Setup
Form under General > Options CW Delay and are:</DIV>
<DIV> </DIV>
<DIV>Key-Up – This setting delays the removal of PTT following the end of a CW
character.</DIV>
<DIV> </DIV>
<DIV>Key-Down – This setting delays the generation of RF following the closure
of the CW key. </DIV>
<DIV> </DIV>
<DIV>Both these settings are intended to enable the user to prevent ‘hot
switching’ of PA and Linear Amplifier etc. relays.</DIV>
<DIV> </DIV>
<DIV>Note that the Key-Down delay is added to the length of a CW character in
order to prevent shortening of the the first character sent. This value
will need to be reduced from the default 20mS when very high CW speeds are used
i.e. above 50 WPM.</DIV>
<DIV> </DIV>
<DIV>If you are using subsequent amplifiers etc. that switch very fast e.g. PIN
diodes, then you can safely reduce these settings to a few mS. The
default values should be suitable for most systems unless you have a very slow
relay in the chain.</DIV>
<DIV> </DIV>
<DIV>All the features of the Iambic CW Keyer previously included in PowerSDR
have been incorporated plus ‘Semi Bug’ were dashes are sent manually and dots
automatically. All the features of the CWX keyboard-to-CW code in
PowerSDR are still available.</DIV>
<DIV> </DIV>
<DIV>Removal of all CW generation from PowerSDR has been a very large project
involving numerous modifications to PowerSDR and all previously developed FPGA
code. However, not only do these changes remove all latency on transmit
they also greatly simplify the inclusion of CW for those writing PC code for
openHPSDR based boards.</DIV>
<DIV> </DIV>
<DIV>My thanks go to Doug, W5WC, Joe, K5SO and Warren, NR0V, for all
the effort they have put in to produce such a high quality result. I
would also like to thank the members of the Beta test team for their assistance
and in particular Vasiliy, Norbet and Tom, DF2LF, for the outstanding quality of
their feedback whilst chasing some very taxing bugs.</DIV>
<DIV> </DIV>
<DIV>Please note that you MUST use the new version of PowerSDR, which will be
released shortly, with the new FPGA code since the new features are not
supported by previous releases. </DIV>
<DIV> </DIV>
<DIV>73 Phil...VK6PH </DIV>
<DIV> </DIV>
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