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<DIV><SPAN class=273263123-23112018><FONT face=Arial>Hi All,</FONT></SPAN></DIV>
<DIV><SPAN class=273263123-23112018><FONT face=Arial></FONT></SPAN> </DIV>
<DIV><SPAN class=273263123-23112018><FONT face=Arial>I know I'm starting to lose
it, no doubt of that, but I swear I remember the early (very early) concept of
DFC being one where the big, full 60MHz FFT was done in the FPGA before being
sent over PCIe to the computer. I seem to remember having seen a
lecture by NR0V or VK6PH where this was the original DFC architecture, ie
to do almost all the heavy lifting in the computer (and/or video proc), but to
let the FPGA crunch out the FFT before going over to the PC.</FONT></SPAN></DIV>
<DIV><SPAN class=273263123-23112018><FONT face=Arial></FONT></SPAN> </DIV>
<DIV><SPAN class=273263123-23112018><FONT face=Arial>Or do I need to check
myself into the looney bin?</FONT></SPAN></DIV>
<DIV><SPAN class=273263123-23112018><FONT face=Arial></FONT></SPAN> </DIV>
<DIV><SPAN class=273263123-23112018><FONT face=Arial>73, Bryan
W4WMT</FONT></SPAN></DIV>
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