[hpsdr] [FPGA_USB] Review/Comments FPGA_USB Board - April 5, 2006

[Christopher T. Day]

You are all right, there is probably only a weak case for this RAM. But
the other consideration is that this moment is by far the cheapest
moment to put in an unpopulated pad for the RAM. You guys are way beyond
my league in schematic drawing and layout, so maybe it's still too
expensive in effort and real estate. I only know it will only rapidly
get much more expensive.

On another point, there are three pins left on Port C according to
Phil's block diagram [Wow, by the way]; should they allow control of the
FPGA Configuration Mode from the FX2, or will we always need to fiddle
jumpers? I would think that pull ups/downs for a default mode [AS gets
my vote] that the FX2 could programmatically override would be possible
without too much trouble.

And a few more. Phil commented that he figured the FX2 would essentially
always be loaded via USB at turn-on, hence the I2C EEPROM wouldn't be
needed. True in a lot of scenarios, and it could normally be unpopulated
like the Xylo, but there have been some messages going by figuring to
have a DSP engine in the Atlas box so, once firmware/configurations were
downloaded, the PC was no longer needed. [Not sure what these folks have
in mind for an interface, but a beacon might not need much of one.] That
led me to conclude that somebody will want to take a stand-alone Atlas
box out on Field Day without the PC. _Then_ you probably need the I2C
EEPROM.

On JTAG driven by Cyclone rather than FX2. I hadn't thought of that. If
it works, that should be fine, however, according to the Cyclone Device
Handbook, the JTAG pins are not available in User Mode; I haven't caught
up with the Cyclone II manual, so don't know the status there. If the
pins are unavailable in User Mode, then what? Connect the Atlas JTAG to
general purpose I/O pins on the Cyclone? Multiple JTAG chains ok with
everybody?

And one last bit. What do we intend to do about a USB VID/DID (Vendor
ID/Device ID) pair? As Phil points out, even though the FX2 by necessity
will come up with one if nothing else is done, that pair belongs to
Cypress and their manual explicitly states it is _not_ to be used for
"production" devices. One of the I2C EEPROM's jobs is to supply a
different one. Official IDs can be had from www.usb.org, but at a price
of about $2000 as far as I can see. Presumably we'd only need one VID
for all the projects we do, but that's still a lot of money from my
perspective.

Done for this round. Sorry if this is all nit-picking, but it seems like
the optimal time for picking nits.


	Chris - AE6VK

P.S. - I'm a novice at this so very susceptible to Lyle's over
generalization syndrome.


-----Original Message-----
From: Lyle Johnson [mailto:kk7p at wavecable.com] 
Sent: Friday, April 07, 2006 12:41 PM
To: Philip Covington
Cc: Eric Blossom; Christopher T. Day; High Performance Software Defined
Radio Discussion List
Subject: Re: [hpsdr] [FPGA_USB] Review/Comments FPGA_USB Board - April
5, 2006

>> I don't think you'll need it.  The earliest USRP prototypes had it,
>> but we never used it, and dropped it from the design.  The current
>> USRP FX2 firmware is ~6KB.
> 
> I agree.  I can't imagine needing any more than the 16 kB.  Then
> there's the fun of making sure the external RAM is initialized
> correctly when using SDCC.

Yep. Keep it simple.  If some application comes along that NEEDS the 
RAM, another board can be created.  My experience indicates that 
everyone always tries to generalize the solution so it will be a 
"standard design" but the customer always requires something custom and 
the design gets re-spun.  Look at how many "universal" PC104 CPU boards 
there are, how many "universal" widgets there are, and how many people 
are employed designing more :-)

73,

Lyle KK7P



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