[hpsdr] Cyclone II with Nios core for SDR

[Philip Covington]

On 12/11/06, Murray Lang <murray.lang at metoceanengineers.com> wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Hi Jay,
> I know that you learn most from failures, but I need to be selective
> with my spare time these days.
> I've only just discovered DttSP myself, but it seems as good a place as
> any to start. Nios is a DSP IP (Intellectual Property not Internet
> Protocol) core that drops into a Cyclone II FPGA and takes advantage of
> that FPGAs specialised multiplier elements. The development kit also
> comes with a Nios port of the uC/OS-II RTOS, which seems to have all of
> the threading and synchronisation primitives you would need. There's
> plenty of memory on the development board.
>
> I suspect it would be more painstaking than difficult - replace POSIX
> thread and synch calls with uC/OS equivalents; replace FTTW calls with
> whatever the Nios libraries provide; replace I/O calls (now that could
> be painful). The biggest problems I've had in the past with porting
> between operating systems (apart from GUI inconsistencies) is where a
> different thread scheduling algorithm exposes incorrectness in thread
> synchronisation that didn't manifest in the original. Since DttSP has
> already been ported between Linux and Win32, any such bugs should have
> been smoked out.
>
> Anyway, in the absence of alarm bells I'll push ahead.
>
> Murray

Murray,

Please keep us updated on your progress with Nios and the Cyclone II.
Sounds like an interesting project.  Maybe some DttSP functions can be
sped up with the Nios C2H compiler.

Phil N8VB

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