[hpsdr] bypass caps

[Ray Anderson]

Steve-

Take a look at the following papers that were published by me and my
colleagues at Sun Microsystems over the past years. The first couple
illustrate some capacitor mounting topologies. Also see pages 5-7 in the
app note from Xilinx (which was also based on the work we did at Sun)


http://www.si-list.org/files/published/sun/cpmt_1999.pdf
  (see page 10)

http://www.si-list.org/files/published/sun/epep_1998.pdf
 (see page 3)

http://si-list.org/files/published/DC05/ 
(relevant discussion in the paper and presentation)

http://www.xilinx.com/bvdocs/appnotes/xapp623.pdf
(see pages 5-7)

73,	Ray	WB6TPU



-----Original Message-----
From: hpsdr-bounces at hpsdr.org [mailto:hpsdr-bounces at hpsdr.org] On Behalf
Of Steven Bible
Sent: Thursday, July 06, 2006 8:37 AM
To: hpsdr at hpsdr.org
Subject: Re: [hpsdr] bypass caps

***** High Performance Software Defined Radio Discussion List *****


Are there some diagrams to illustrate these principles?  

Thanks,

- Steve N7HPR


-----Original Message-----
>From: Ray Anderson <ray.anderson at xilinx.com>
>Sent: Jul 6, 2006 7:57 AM
>To: hpsdr at hpsdr.org
>Cc: FRANCIS CARCIA <carcia at sbcglobal.net>
>Subject: Re: [hpsdr] bypass caps
>
>***** High Performance Software Defined Radio Discussion List *****
>
>
>
>>-----Original Message-----
>>From: hpsdr-bounces at hpsdr.org [mailto:hpsdr-bounces at hpsdr.org] On
>Behalf Of >FRANCIS CARCIA
>>Sent: Thursday, July 06, 2006 6:12 AM
>>To: hpsdr at hpsdr.org
>>Subject: [hpsdr] bypass caps
>
>>***** High Performance Software Defined Radio Discussion List *****
>>hi All,
>>Trace terminations to bypass caps can have a big effect on RF
>performance.
>>A simple trace to one side of a chip cap adds a lot of inductance in
>series >with the cap. The best termination is to use 2 traces to the
cap
>contact in >and out. The ground side usually goes to a plane but the
>high side >termination can degrade the performance of the bypass. frank
>wa1gfz
>
>
>Actually, the preferred method to achieve low mounting inductance for
>decaps is to attach the decaps directly to power planes on both the GND
>and VCC side. The spreading inductance contributed by the planes is
many
>times lower than you can ever achieve utilizing traces. The closer the
>spacing of the GND and VCC plane pair the lower the inductance. 
>
>For really low mounting inductance you can go to a via-in-pad design or
>vias between the pads to connect to the planes. The bottom line is you
>want to minimize the current loop area. 
>
>-Ray	WB6TPU
>
>
>
>_______________________________________________
>HPSDR Discussion List
>To post msg: hpsdr at hpsdr.org
>Subscription help: http://lists.hpsdr.org/listinfo.cgi/hpsdr-hpsdr.org
>HPSDR web page: http://hpsdr.org
>Archives: http://lists.hpsdr.org/pipermail/hpsdr-hpsdr.org/


\r\n- Steve\r\n  (n7hpr at tapr.org)\r\n
_______________________________________________
HPSDR Discussion List
To post msg: hpsdr at hpsdr.org
Subscription help: http://lists.hpsdr.org/listinfo.cgi/hpsdr-hpsdr.org
HPSDR web page: http://hpsdr.org
Archives: http://lists.hpsdr.org/pipermail/hpsdr-hpsdr.org/



 1152202036.0