[hpsdr] bypass caps

[Ray Anderson]

Francis-

 

You are correct, the ATLAS bypass scheme is definitely not the best for
fast rise-time, high frequency signals. It was a compromise design due
to the limited # of layers utilized in the layout due to $
considerations.

 

I'm not sure any amount of optimizing the decap escapes is going to make
it 'high performance' with regards to decoupling simply because of the
lack of a VCC plane.

 

The thing that makes the ATLAS viable even though the bypassing isn't
all that great is the fact that there will be good (we hope) bypassing
on the application boards plugged into the backplane buss (ATLAS). As
long as the decoupling on the application boards is decent the current
consumers (FPGA's, ASICS, etc.) will see a low impedance current source
and be happy. The decoupling on the ATLAS merely provides a reservoir of
charge for low frequency demands.

 

73,        Ray      WB6TPU

 

________________________________

From: FRANCIS CARCIA [mailto:carcia at sbcglobal.net] 
Sent: Thursday, July 06, 2006 8:54 AM
To: Ray Anderson
Subject: RE: [hpsdr] bypass caps

 

Ray,

I agree when you have 2 planes. I noticed the caps along the side of
Atlas and thought we might look closer to this as RF boards are
designed. fc. 

Ray Anderson <ray.anderson at xilinx.com> wrote:

	
	
	 

 

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