[hpsdr] Janus ESD terminations
Lyle Johnson
kk7p at wavecable.com
Mon Jun 5 13:13:03 PDT 2006
> I plan to get a supply of small chip resistors and lay them in across
> the connector pins A row to B row then C row to B row. The layout is
> tight and the connector field looks like the best spot. It is a real
> drag to blow out an FPGA with ESD...
Good idea.
52 pieces of 100K resistor in 0603 (or perhaps 0805) SMD packages would
probably work well for this.
C2...C25, C27, C29, C31 to the corresponding B pins.
A2..A19, A22..A25, A27, A29, A31 to the corresponding B pins.
Skip A20 and A21 because they already have resistors to +3.3V (part iof
I2C).
73,
Lyle KK7P
1149538383.0
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