[hpsdr] [CASMIR] Design v0.3

[Robert McGwier]

My apologies for the tardiness of this note.  I have been dealing with 
my poor mother in law who fell in NYC last weekend and cracked her jaw 
and a couple of ribs contemporaneously with major developments at work.

Let me chime in with my 100% agreement with Phil.  -40 dB down and -50 
dB  down for   opposite sideband and carrier  are nonstarters.  Here in 
the northeast,  I can find 20-30 over S9 signals all the time.  I would 
prefer by opposite sideband be weaker than S7-S8 and my carrier weaker 
than S5-S6 and so would my neighbors!


Doing an NCO in the FPGA means eventually turning the digital signal 
back into analog.  ALMOST ALL SPURS that cannot be avoided through 
software cleverness in modern DDS from (say) Analog Devices,  come from 
DAC nonlinearities and I doubt any filtering scheme you might design for 
PWM back to analog will be anywhere near close enough to adequate for 
this purpose so DAC's seem in order.

You can take a DDS and use it as a reference to a PLL circuit.  The PLL 
circuit filters the spurs off at a cost of increased phase noise.  There 
is no such thing as a free lunch.

Bob





Phil Harman wrote:
> ***** High Performance Software Defined Radio Discussion List *****
>
> Not sure I agree about the use of an FPGA to do the NCO.  I've been using 
> the free Altera NCO Megafunction to design the  complex oscillator so we can 
> test the LT2208.
>
> With an FPGA there are a lot of design parameters you can change and see the 
> effect on the level of spurious signals with the Altera design software.  By 
> using lots of phase and amplitude bits you can get a very clean DDS. I guess 
> that will be degraded when we have to add a DAC to get into the real world 
> for a transmitter. Even so it looks like a viable option and one we will be 
> using in the Mercury board.
>
> For HF I would be very interested in looking at a microwave VCO ( say 3GHz) 
> driving a series of dividers to reduce the phase noise.  A number of 
> commercial radios do this as well as the TT Orion I believe. We only need 
> about 10kHz steps at HF since we can interpolate in software.  I know that 
> Chris Bartram is an expert in factional N freq synths so expect that is the 
> way that the uWSDR group will go.
>
> Alex, how do you intend to provide Tx signals from 1 - 10MHz since I see the 
> lower frequency of the AD chip you propose to use is 10MHz?
>
> I think that it is important that we use complex mixers where we can trim 
> the amplitude and phase values to optimise sideband suppression. Otherwise 
> 40dB of attenuation is not going to win you any friends with the locals on 
> 2m, especially if your unwanted sideband is 10s kHz  away from your main 
> signal.
>
> 73's Phil....VK6APH
>
>
>
>
>
>
> ----- Original Message ----- 
> From: "David Bengtson" <davemailinglist at verizon.net>
> To: "Alex" <harvilchuck at yahoo.com>
> Cc: <hpsdr at hpsdr.org>
> Sent: Wednesday, June 07, 2006 6:18 PM
> Subject: Re: [hpsdr] [CASMIR] Design v0.3
>
>
>   
>> ***** High Performance Software Defined Radio Discussion List *****
>>
>> Alex wrote:
>>     
>>> ***** High Performance Software Defined Radio Discussion List *****
>>>
>>> Ok, I've posted a draft design at 
>>> (http://www.hamsdr.com/personaldirectory.aspx?id=285), updated with Wiki 
>>> with a link.
>>> The drawing is in the same format as the visio file for the other boards.
>>>
>>> There are three directions the design can go:
>>>
>>> (1) Use the AD9958 and generate the LO from the FPGA
>>> (2) Use a AD9959 and don't let the FPGA generate the LO
>>> (3) eliminate the DDS and let the FPGA do all the work
>>>
>>> Any thoughts?
>>>
>>> CASMIR is dependant on new Reflock VHDL code from GIBRALTAR.
>>> CASMIR is reusing the basic circuit configuration from JANUS (ATLAS bus 
>>> to FPGA).
>>>
>>> Alex, N3NP
>>>       
>> I'm of the opinion that using an FPGA to generate a reference signal is
>> a bad idea from a spurious/noise point of view. I haven't looked at the
>> AD data sheets in a long time, but I'd be inclined to recommend option
>> 4, use a real crystal oscillator to generate the LO for the DDS.
>>
>>
>> Dave
>>
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>
>
>
>   


-- 
AMSAT VP Engineering. Member: ARRL, AMSAT-DL, TAPR, Packrats,
NJQRP/AMQRP, QRP ARCI, QCWA, FRC. ARRL SDR Wrk Grp Chairman
Laziness is the number one inspiration for ingenuity.  Guilty as charged!


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