[hpsdr] FXLP GPIF page chaining?
Eric Blossom
eb at comsec.com
Fri Jun 9 13:24:12 PDT 2006
On Fri, Jun 09, 2006 at 03:30:15PM -0400, Jim Miller wrote:
> I was trying to do a simple version of an FX2LP AutoIn/AutoOut using the
> GPIF machines to continuously stream audio bytes in/out from the endpoints
> without 8051 intervention. The reads and writes would need to interleave
> after being triggered.
>
> Doesn't seem possible after several readings of the TRM...
>
> Otherwise it seems it requires the '51 to trigger a fifo in for a few
> transactions (bytes) then immediately trigger a fifo out for a few
> transactions. The transaction counter would be used in S7 to determine
> whether to quit and allow the other fifo transaction burst to occur. The
> burst length would need to be sized long enough to keep from running the '51
> ragged setting up the next transaction.
>
> Any ideas?
> jim ab3cv
I don't think it'll run full-duplex without intervention.
At least I couldn't figure out how ;)
The USRP code runs a main loop that makes the relevant checks.
It's still coded in C, but you could knock a few usecs off of the
loop by moving it into ASM. I haven't felt compelled to do that yet.
In measurements made with a logic analyzer, I recall that the worst
case delay between a flag assertion and kicking off the DMA was on the
order of 7 usecs. I was measuring the time from when the FPGA asserted
"I've got a packet ready" and the start of the DMA.
FYI, we burst 512 bytes at a time to/from the FPGA.
With this setup we can sustain a total of 32MB/sec across the USB.
We often split it up 16MB/s in, 16MB/s out. Any partitioning with a
total < 32MB/s seems to work.
Eric
1149884652.0
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