[hpsdr] Xilinx Coregen DDS

[KD5NWA]

I don't know about Altera, but Xilinx gives you the DSP and CPU core 
generator with a one year license when you buy their $99 demo board. 
The product continues to function after a year but will not create or 
change new or existing designs. They were very clear that code 
generated with the product could be used forever and be given to 
others. It's the software that they wanted to control.

At 12:04 PM 6/14/2006, Eric Blossom wrote:
>***** High Performance Software Defined Radio Discussion List *****
>
>On Wed, Jun 14, 2006 at 11:56:30AM +0100, Leon Heller wrote:
> > ***** High Performance Software Defined Radio Discussion List *****
> >
> > As an exercise, I tried generating the simplest possible DDS with the
> > CoreGen - 100 MHz clock input, fixed 5 MHz single sine output, six bits.
> > Here is the VHDL it generated:
> >
>
>Hi folks,
>
>No offense meant to the Xilinx and/or Altera people on the list, but
>given the goals of this group, we'd be better served by ensuring that
>we are not using any vendor supplied code generators.
>
>Looking at the generated output seems like a reasonable thing to do.
>However, actually using it seems like a step in the wrong direction.
>
>It wouldn't be a big deal to write some python/lisp/perl/... code that
>given a set of parameters would generate a CORDIC based DDS, or for
>that matter, handle the fixed output frequency in the example.  Once
>the generator was written once, we'd have a piece of free software
>that could be used over and over, independent of the part or tool
>vendor chosen for a particular project.
>
>Eric
>K7GNU
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Cecil Bayona
KD5NWA
www.qrpradio.com

"Windows, the most successful software virus ever" Don Seglio Batuna 



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