[hpsdr] Xilinx Coregen DDS

[KD5NWA]

Do you have a pointer to were it talks about them being free? I have 
a feeling that we are not talking about the same software. The 
software I was talking about was not $500 but over a $1000 each. I 
played with the EDK kit about a week ago and it was still functional, 
it had not timed out.

The last time I looked 8.1i was out, but the only free ones were the 
limited time demos, the real thing you had to pay money for.

I just looked, the EDK kit, is an option that you can buy but it's 
not free, it's used to generate CPU's in the FPGA,  but the fully 
functional version is included with the demo board, I see no 
reference to the System Generator for DSP being free, it's still for sale.

It could be that a subset of the functions are available for free but 
from what I can see with a quick look the full software is still not 
free. The software that I'm talking about, its a collection of 
hundreds of DSP functions but also a generator that will take MatLab 
or SimuLink files and turn them into hardware/functions so you can 
create the pieces of code you want in MatLab, such as 
demodulators,  FFT filters, custom FFT and IFFT functions. Once 
created you can use them just like any built in function.

At 05:16 PM 6/14/2006, you wrote:
>***** High Performance Software Defined Radio Discussion List *****
>
>The Xilnx ISE and Core Generator, including the DDS, CORDIC, FFT and other
>functions are available free for download from the Xilinx web site. They
>cost $500 a year in the past, but have been free since the 8.1 release.
>
>73,
>
>John
>KD6OZH
>
>----- Original Message -----
>From: "Eric Blossom" <eb at comsec.com>
>To: "Leon Heller" <leon.heller at bulldoghome.com>
>Cc: <softrock40 at yahoogroups.com>; "High Performance Software Defined Radio
>Discussion List" <hpsdr at hpsdr.org>
>Sent: Wednesday, June 14, 2006 17:04 UTC
>Subject: Re: [hpsdr] Xilinx Coregen DDS
>
>
> > ***** High Performance Software Defined Radio Discussion List *****
> >
> > On Wed, Jun 14, 2006 at 11:56:30AM +0100, Leon Heller wrote:
> > > ***** High Performance Software Defined Radio Discussion List *****
> > >
> > > As an exercise, I tried generating the simplest possible DDS with the
> > > CoreGen - 100 MHz clock input, fixed 5 MHz single sine output, six bits.
> > > Here is the VHDL it generated:
> > >
> >
> > Hi folks,
> >
> > No offense meant to the Xilinx and/or Altera people on the list, but
> > given the goals of this group, we'd be better served by ensuring that
> > we are not using any vendor supplied code generators.
> >
> > Looking at the generated output seems like a reasonable thing to do.
> > However, actually using it seems like a step in the wrong direction.
> >
> > It wouldn't be a big deal to write some python/lisp/perl/... code that
> > given a set of parameters would generate a CORDIC based DDS, or for
> > that matter, handle the fixed output frequency in the example.  Once
> > the generator was written once, we'd have a piece of free software
> > that could be used over and over, independent of the part or tool
> > vendor chosen for a particular project.
> >
> > Eric
> > K7GNU
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Cecil Bayona
KD5NWA
www.qrpradio.com

"Windows, the most successful software virus ever" Don Seglio Batuna 



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