[hpsdr] Horton LO

pvharman at arach.net.au pvharman at arach.net.au
Fri Jun 16 00:13:45 PDT 2006


Chris,

The DDS provides the fine frequency steps. Since we can get away with 10kHz 
steps I don't see why a DDS is required. 


Bob,

I was looking at a canned GHz oscillator, not multiplying up.  A 2.4GHz DIP 
VCO when divided down should give a very respectable phase performance. 

The ADF4153 Fractional_N chip works up to 4GHz. 

73's Phil...VK6APH 


Quoting "Christopher T. Day" <CTDay at lbl.gov>:

> I'm interested that Oleg says in his first paragraph that Drentea's
> hybrid solution would have worked if he could have gotten the DDS chips.
> We can get the DDS chips. Why not use Dentrea's solution?
> 
> 
> 	Chris - AE6VK
> 
> 
> -----Original Message-----
> From: Robert McGwier [mailto:rwmcgwier at comcast.net] 
> Sent: Thursday, June 15, 2006 11:25 PM
> To: pvharman at arach.net.au
> Cc: hpsdr at hpsdr.org
> Subject: Re: [hpsdr] Horton LO
> 
> ***** High Performance Software Defined Radio Discussion List *****
> 
> 
> 
> Bob
> 
> 
> pvharman at arach.net.au wrote:
> > ***** High Performance Software Defined Radio Discussion List *****
> >
> > A few further thoughts about the local oscillator for Horton. 
> >
> > We seem to be considering two options:
> >
> > 1.	A DDS based design
> > 2.	Dividing down a GHz oscillator
> >
> > Both would appear to give very good phase performance. The DDS may
> have spur 
> > issues and the divider method will be more complex. 
> >
> > For those that have access to the latest DDS chips what short of
> performance 
> > are you seeing? Are the latest devices really suitable of use on
> 10/6m  
> > directly as a LO in terms of spur levels?
> >
> > I had a look at Oleg  UR3IQ article on Fractional-N. His reported
> phase noise 
> > is quite good  (-120dBc/Hz at 2kHz) but looking at the reported
> performance of 
> > the Orion (which uses UHF oscillators divided down) they are getting
> -130dBc 
> > at 200Hz. I see that for some reason the Orion phase noise actually
> degrades 
> > at  40-50kHz, not quite sure why that should be. 
> >   
> 
> This is almost surely a PLL design fault.
> 
> > I also looked at the US patent (5,847,615) that Oleg mentions. More
> complex 
> > than Oleg's circuit but should be capable of very good performance.
> >
> > Returning to  option 2.  I can't help thinking that if we use a GHz
> VCO and 
> > divide this down to  1-120MHz in say 40kHz steps and then divide by 4
> to give 
> > us quadrature signals at 10kHz steps then we may be able to do this
> without 
> > the need to resort to Fractional-N techniques.  With 96/192k A/D
> sampling 
> > doing the fine frequency resolution in the DSP code will be fine.
> >   
> 
> If we get the GHz VCO from multiplying some lower frequency oscillator 
> up we will pay in an increased phase noise penalty and in fact, the 
> phase noise will never be as good as the lower frequency oscillator 
> inside. How does it work? If you have sent a candidate part or design, I
> 
> have missed it. Can you repeat?
> 
> 
> > Anyone with synthesizer design experience out there able to comment
> please?
> >
> > 73's Phil...VK6APH 
> >
> >
> >   
> 
> 
> -- 
> AMSAT VP Engineering. Member: ARRL, AMSAT-DL, TAPR, Packrats,
> NJQRP/AMQRP, QRP ARCI, QCWA, FRC. ARRL SDR Wrk Grp Chairman
> Laziness is the number one inspiration for ingenuity.  Guilty as
> charged!
> 
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