[hpsdr] Horton LO

Ray Anderson ray.anderson at xilinx.com
Fri Jun 16 16:24:56 PDT 2006


Chris wrote:

>How far off is this picture? 

>For 2), it feels to me that a frequency selection is missing - if
Horton
>is running at 125MHz, how do I choose to hear 7.020 MHz?

>For 3), why does it have to be a quad divider?

Chris-

2) I believe it is proposed to have some sort of programmable divider
between the 125 MHz and the QSD to divide the signal down to the desired
user frequency (7.020 MHz in your example) this may possible be realized
as a FPGA.


3) It is a quad divider so that each of the 4 phases of the 125MHz
coming out of the Johnson counter is divided down to the same frequency
that the Horton QSD needs.

At least that is how I understand it. However a diagram would be a great
aid to understanding the concept and assuring everyone is on the same
page.

-Ray   WB6TPU



 1150500296.0


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