[hpsdr] Horton LO

[Philip Covington]

On 6/16/06, Philip Covington <p.covington at gmail.com> wrote:
> On 6/16/06, Phil Harman <pvharman at arach.net.au> wrote:
> > ***** High Performance Software Defined Radio Discussion List *****
> >
> > Ok - I worked through Phil C's math last night and it looks fine to me. I
> > will draw up a block diagram and the divider list today and post to the
> > forum.
> >
> > Phil...VK6APH
>
> Hi Phil,
>
> Take a look at the Minicircuits ROS-2150VW.  Its tuning range is
> 970-2150 and the phase noise isn't too horrible.  This with a National
> PLL tuning in coarse steps might do it.  We'd have to divide down into
> a range where the CPLD or FPGA would handle the final divider chain.
>
> 73 de Phil N8VB
>

Basically what I was thinking about back then is a modern day version
of the HP 8640B.  HP takes a cavity oscillator and divides it down to
give you the ranges from 512 down to 0.5 MHz with good phase noise.
With a PLL and VCO running in the 1000-2000 MHz range (like the
ROS-2150VW or a home made VCO) we would program the PLL and divider
chain to give us ham band coverage with 10kHz steps or less.  The
steps get smaller as we divide more, but since we know exactly what
the step size is for a given divide ratio we can take care of the
steps in software.  Initially I was going to use 100-200 MHz, but
higher ranges will work better (like Phil H's microwave VCO
suggestion).

73 de Phil N8VB

 1150514901.0