[hpsdr] More on Horton LO

Hans Summers hans.g0upl at googlemail.com
Mon Jun 19 05:09:54 PDT 2006


Chuck,

> Now a question, if the clock for a DDS has jitter(phase noise) how can
> the output not have jitter?  I think if we use a DDS we will want the
> highest possible 500 MHz multiplied crystal to get the cleanest signal.
> I don't have data but I think the higher frequency clock results in
> lower spurs.   Comments

My understanding is that the jitter (phase noise) on the DDS reference
clock does indeed go right through to the output (reduced by 6dB per
octave division as usual). So it is important to use a high quality
crystal reference for the DDS.

Many VHF canned oscillators seem to use a VHF LC oscillator phase
locked to a lower frequency crystal, which produces much inferior
phase noise. So it is important to use a reference oscillator whose
phase noise is well specified. That would be a crystal harmonic
oscillator rather than a phase locked LC.

The excellent phase noise figures reported in the DDS datasheets are
actually "residual" phase noise, which means this is the phase noise
contributed by the DDS itself, ON TOP of the existing phase noise of
the crystal reference clock. At least, this is my understanding.

The spurs at the output of the DDS are mainly dependent on the ratio
of output frequency to reference frequency. For minimum spurs the
reference clock should therefore be as high as possible. WITHOUT using
the DDS internal multipliers that are available in some devices, since
these are PLL's and degrade phase noise performance.

Again, I am open to correction on all of this because I am a DDS
novice but from my reading so far, this is what I understand to be the
case.

I have heard of W6XX using AD9951 sersies DDS with reference clocks up
to 750MHz without trouble, despite this being drastically over the
specification (from memory I think it is specified to 400MHz). W6ZCB
uses 666MHz. So: don't be afraid to go past 500MHz!

73 Hans G0UPL
http://www.hanssummers.com

 1150718994.0


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