[hpsdr] [ATLAS] - proposed physical bus/pcb design 03March2006
Lyle Johnson
kk7p at wavecable.com
Fri Mar 3 10:03:32 PST 2006
Hello Phil!
> For those interested, I'd appreciate if you'd please take a look at
> the documents and make questions/comments.
In general I like what I see.
A suggestion: I would like to see some small subset of a bus, maybe one
of the X buses so it will be supported with a 64-pin DIN connector - be
changes such that it is daisy chained between slots. This makes it much
easier to set up things like JTAG chains, slot-based priority interrupt
schemes, and the like.
Foe example Bus XC[0:7] could be broken into XC[0:3] as at present. The
present wiring of XC[4:7] going to pins A[22:25] might be rewired like this:
J1 J2 J3 J4 J5 J6
A22---A22 A22---A22 A22---A22
A23 A23---A23 A23---A23 A23--- to J1 A23 or n/c
A24---A24 A24---A24 A24---A24
A25 A25---A25 A25---A25 A25--- to J1 A25 or n/c
I realize this can be done by cutting on the board, but the X traces are
inner layer and the Y traces are only on the 96-pin connectors.
Alternately, this could be done on the Y traces and just accept the fact
that this is a "high end" feature and thus only supported on 96-pin
boards. This restriction, however, means that any intervening boards
must also be 96-pin, which limits it usefulness.
73,
Lyle KK7P
1141409012.0
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