[hpsdr] FX2 / I2C multi-master

[Christopher T. Day]

Eric,

>From my glance at the I2C spec,

<http://www.semiconductors.philips.com/acrobat_download/literature/9398/
39340011.pdf>,

there doesn't appear to be a need for a distinct arbitrator if the
masters behave themselves. 

I've been trying to get to working with the OpenCores Wishbone-compliant
I2C master. Unfortunately, so far I have gotten myself stuck working
through the Wishbone examples; as far as I can see, the simple DMA
example is wrong and I haven't managed to fix it yet. Anyway, the I2C
core should do everything necessary, I think.


	Chris - AE6VK


-----Original Message-----
From: Eric Blossom [mailto:eb at comsec.com] 
Sent: Wednesday, March 15, 2006 1:39 PM
To: Christopher T. Day
Cc: High Performance Software Defined Radio Discussion List
Subject: Re: [hpsdr] FX2 / I2C multi-master

On Wed, Mar 15, 2006 at 12:44:18PM -0800, Christopher T. Day wrote:
>... Isn't I2C multi-master? Couldn't the FPGA
> also fiddle the chips? Note that that is strictly a technical
question.

You're right it could.  The FX2 drives SCL with on open-drain pin.

> ... Just wondering if it's technically possible, that's
> all.

I think it is possible modulo arbitration.  Also, I think you can
build a I2C master in about a 100 LE's, so I wouldn't sweat the
resource consumption.

> Clearly, I need to work though the use cases for chip control and
> interaction some more.

Always a good plan ;)

Eric, K7GNU


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